參數(shù)資料
型號： AT89C51SND2C-7FTUL
廠商： Atmel
文件頁數(shù)： 7/160頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 64K MP3 100BGA
標(biāo)準(zhǔn)包裝： 260
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，IDE/ATAPI，MMC，SPI，UART/USART，USB
外圍設(shè)備： 音頻，I²S，MP3，PCM，POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.3 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-TFBGA
包裝： 托盤
其它名稱： AT89C51SND2C7FTUL
5-12
DS785UM1
Copyright 2007 Cirrus Logic
System Controller
EP93xx User’s Guide
5
set. One example of this is when a power-on-reset is applied and this register bit is cleared.
This means that this bit will not be set on boot-up and will have to be set to maintain the
memory image for when the device re-enters Standby mode.
5.1.6.2.3
RUN HALT mode
A transition from Run mode to Halt mode is caused by reading the Halt register location
0x8093_0008 with the SHena bit set to 1. This has the effect of gating the CPU clock (FCLK)
bus interface, with the APB/AHB system clock, and Memory/DMA system remaining enabled.
5.1.6.2.4
STANDBY RUN mode
There are normally several conditions in which the device can move from Standby mode to
Run mode.
These conditions are:
A falling edge on IRQ interrupt
A falling edge on FIQ interrupt
An exit from a "ClkSet1" write
PRSTn
RSTOn
The EP93xx comes out of Standby if an interrupt occurs or when an exit from a ClkSet1 write
occurs. If a write is performed to the ClkSet1 register, the EP93xx then enters Standby mode
and then automatically comes out of Standby mode and back into the Run state.
5.1.6.2.5
HALT RUN mode
The transition from the Halt state to the Run state is caused by:
A falling edge on IRQ interrupt
A falling edge on FIQ interrupt
RSTOn
5.1.7 Interrupt Generation
The Syscon block generates two interrupts: TICK interrupt and Watchdog Expired interrupt.
The block generates the TICK interrupt based upon the 64 Hz clock, which is derived from
the 32.768 KHz oscillator. The interrupt becomes active on every rising edge of the internal
64 Hz clock. It can be cleared by writing to the TEOI location.
Watchdog Expired interrupt becomes active on a rising edge of the 64 Hz TICK clock, if the
TICK interrupt is still active. In other words, if a TICK interrupt has not been served for a
complete TICK period, a watchdog expired interrupt is generated. It can be cleared by writing
to the TEOI location as well.
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參數(shù)描述
AT89C51-W 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89C52 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 8K Bytes Flash
AT89C52_00 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
AT89C52_99 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
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