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| 型號： | ADUC7021BCPZ62-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 76/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 12BIT 1MSPS UART 40-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 44MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | PLA，PWM，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 13 |
| 程序存儲器容量： | 64KB（32K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
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ADuC7019/20/21/22/24/25/26/27/28
Rev. B | Page 78 of 92
Table 76. T1CON MMR Bit Descriptions
Bit
Value
Description
31:18
Reserved.
17
Event Select Bit. Set by user to enable time
capture of an event. Cleared by user to
disable time capture of an event.
16:12
Event Select Range, 0 to 31. These events are
as described in Table 73. All events are offset
by two, that is, Event 2 in Table 73 becomes
Event 0 for the purposes of Timer1.
11:9
Clock Select.
000
Core Clock (HCLK).
001
External 32.768 kHz Crystal.
010
P1.0 Raising Edge Triggered.
011
P0.6 Raising Edge Triggered.
8
Count Up. Set by user for Timer1 to count up.
Cleared by user for Timer1 to count down by
default.
7
Timer1 Enable Bit. Set by user to enable
Timer1. Cleared by user to disable Timer1 by
default.
6
Timer1 Mode. Set by user to operate in
periodic mode. Cleared by user to operate in
free-running mode. Default mode.
5:4
Format.
00
Binary.
01
Reserved.
10
Hr: Min: Sec: Hundredths (23 hours to 0 hour).
11
Hr: Min: Sec: Hundredths (255 hours to 0 hour).
3:0
Prescale.
0000
Source Clock/1.
0100
Source Clock/16.
1000
Source Clock/256.
1111
Source Clock/32,768.
T1CLRI Register
Name
Address
Default Value
Access
T1CLRI
0xFFFF032C
0xFF
W
T1CLRI is an 8-bit register. Writing any value to this register
clears the Timer1 interrupt.
T1CAP Register
Name
Address
Default Value
Access
T1CAP
0xFFFF0330
0x00000000
R
T1CAP is a 32-bit register. It holds the value contained in
T1VAL when a particular event occurrs. This event must be
selected in T1CON.
Timer2 (Wake-Up Timer)
Timer2 is a 32-bit wake-up timer (count-down or count-up)
with a programmable prescaler. The source can be the 32 kHz
external crystal, the core clock frequency, or the internal 32 kHz
oscillator. The clock source can be scaled by a factor of 1, 16,
256, or 32,768. The wake-up timer continues to run when the
core clock is disabled.
The counter can be formatted as plain 32-bit value or as
Hours: Minutes: Seconds: Hundredths.
Timer2 can be used to start ADC conversions as shown in the
block diagram in Figure 66.
04
95
5-
03
6
INTERNAL
OSCILLATOR
EXTERNAL
CRYSTAL
HCLK
PRESCALER
/1, 16, 256
OR 32768
32-BIT
UP/DOWN
COUNTER
32-BIT
LOAD
TIMER2
VALUE
TIMER2 IRQ
Figure 66. Timer2 Block Diagram
Timer2 interface consists of four MMRs: T2LD, T2VAL,
T2CON, and T2CLRI.
T2LD Register
Name
Address
Default Value
Access
T2LD
0xFFFF0340
0x00000000
R/W
T2LD is a 32-bit register load register.
T2VAL Register
Name
Address
Default Value
Access
T2VAL
0xFFFF0344
0xFFFFFFFF
R
T2VAL is a 32-bit read-only register that represents the current
state of the counter.
T2CON Register
Name
Address
Default Value
Access
T2CON
0xFFFF0348
0x0000
R/W
T2CON is the configuration MMR described in Table 77.
Table 77. T2CON MMR Bit Descriptions
Bit
Value
Description
31:11
Reserved.
10:9
Clock Source.
00
External Crystal.
01
External Crystal.
10
Internal Oscillator.
11
Core Clock (41 MHz/2CD).
8
Count Up. Set by user for Timer2 to count up.
Cleared by user for Timer2 to count down by
default.
7
Timer2 Enable Bit. Set by user to enable Timer2.
Cleared by user to disable Timer2 by default.
6
Timer2 Mode. Set by user to operate in
periodic mode. Cleared by user to operate in
free-running mode. Default mode.
5:4
Format.
00
Binary.
01
Reserved.
10
Hr: Min: Sec: Hundredths (23 hours to 0 hour).
11
Hr: Min: Sec: Hundredths (255 hours to 0 hour).
3:0
Prescale.
0000
Source Clock/1 by Default.
0100
Source Clock/16.
1000
Source Clock/256 Expected for Format 2 and
Format 3.
1111
Source Clock/32,768.
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