
ADuC7019/20/21/22/24/25/26/27/28
Rev. B | Page 77 of 92
Timer0 (RTOS Timer)
Timer0 is a general-purpose, 16-bit timer (count-down) with a
programmable prescaler (see
Figure 64). The prescaler source is
the core clock frequency (HCLK) and can be scaled by factors
of 1, 16, or 256.
Timer0 can be used to start ADC conversions as shown in the
04
95
5-
034
16-BIT
LOAD
TIMER0
VALUE
16-BIT
DOWN
COUNTER
PRESCALER
/1, 16 OR 256
HCLK
TIMER0 IRQ
ADC CONVERSION
Figure 64. Timer0 Block Diagram
Timer0’s interface consists of four MMRs: T0LD, T0VAL,
T0CON, and T0CLRI.
T0LD Register
Name
Address
Default Value
Access
T0LD
0xFFFF0300
0x0000
R/W
T0LD is a 16-bit load register.
T0VAL Register
Name
Address
Default Value
Access
T0VAL
0xFFFF0304
0xFFFF
R
T0VAL is a 16-bit read-only register representing the current
state of the counter.
T0CON Register
Name
Address
Default Value
Access
T0CON
0xFFFF0308
0x0000
R/W
T0CON is the configuration MMR described in
Table 75.Table 75. T0CON MMR Bit Descriptions
Bit
Value
Description
31:8
Reserved.
7
Timer0 Enable Bit. Set by user to enable Timer0.
Cleared by user to disable Timer0 by default.
6
Timer0 Mode. Set by user to operate in
periodic mode. Cleared by user to operate
in free-running mode. Default mode.
5:4
Reserved.
3:2
Prescale.
00
Core Clock/1. Default value.
01
Core Clock/16.
10
Core Clock/256.
11
Undefined. Equivalent to 00.
1:0
Reserved.
T0CLRI Register
Name
Address
Default Value
Access
T0CLRI
0xFFFF030C
0xFF
W
T0CLRI is an 8-bit register. Writing any value to this register
clears the interrupt.
Timer1 (General-Purpose Timer)
Timer1 is a general-purpose, 32-bit timer (count down or count
up) with a programmable prescaler. The source can be the
32 kHz external crystal, the core clock frequency, or an external
GPIO, P1.0 or P0.6 (maximum frequency 44 Mhz). This source
can be scaled by a factor of 1, 16, 256, or 32,768.
The counter can be formatted as a standard 32-bit value or as
hours: minutes: seconds: hundredths.
Timer1 has a capture register (T1CAP) that can be triggered by
a selected IRQ source initial assertion. This feature can be used
to determine the assertion of an event more accurately than the
precision allowed by the RTOS timer when the IRQ is serviced.
Timer1 can be used to start ADC conversions as shown in the
0495
5-
03
5
32kHz OSCILLATOR
HCLK
P0.6
P1.0
IRQ[31:0]
PRESCALER
/1, 16, 256
OR 32768
32-BIT
UP/DOWN
COUNTER
32-BIT
LOAD
TIMER1
VALUE
CAPTURE
TIMER1 IRQ
ADC CONVERSION
Figure 65. Timer1 Block Diagram
Timer1’s interface consists of five MMRs: T1LD, T1VAL,
T1CON, T1CLRI, and T1CAP.
T1LD Register
Name
Address
Default Value
Access
T1LD
0xFFFF0320
0x00000000
R/W
T1LD is a 32-bit load register.
T1VAL Register
Name
Address
Default Value
Access
T1VAL
0xFFFF0324
0xFFFFFFFF
R
T1VAL is a 32-bit read-only register that represents the current
state of the counter.
T1CON Register
Name
Address
Default Value
Access
T1CON
0xFFFF0328
0x0000
R/W
T1CON is the configuration MMR described in
Table 76.