參數(shù)資料
型號: 83C795
廠商: SMSC Corporation
英文描述: Ethernet System Controller
中文描述: 以太網(wǎng)系統(tǒng)控制器
文件頁數(shù): 72/136頁
文件大?。?/td> 1996K
代理商: 83C795
Any writes to the ADDRESS port that do not match
the Initiation Key sequence will cause the logic to
reset back to the start of the Key. While the PnP
state machine is in the WaitForKey state, all access
to the READ_DATA or WRITE_DATA ports is
disabled.
Once the state machine is in the Sleep state, the
board responds to a WAKE[CSN] command. Each
PnP board has a register to store a Card Select
Number, and this register contains a zero at
power-up. The card responds to a WAKE[CSN]
command only if the CSN in the command matches
the value in the Card Select Number register. If the
card’s CSN does not match the CSN in the
WAKE[CSN], it goes into the sleep state. The card
stays in the sleep state until awakened by the
correct WAKE[CSN]. If the CSN is zero, then the
card enters the Isolation state, otherwise it moves
into the Configuration state.
6.8.2.1
A simple algorithm is used to isolate each Plug and
Play card. The isolation protocol requires that each
card contain a unique number, referred to as the
serial identifier This is a 72-bit number composed
of two 32-bit fields and an 8-bit checksum. The first
field is a vendor identifier. The second can be any
value - for example, a serial number or part of a LAN
address. The number is accessed serially, bit by bit,
by the isolation logic and is used to differentiate the
adapters.
Isolation
The PnP software begins the isolation by sending
out a Wake[0] command. This will cause all PnP
cards that have not been isolated to transition to the
Isolation state. If this is the first pass through the
protocol, then the software will pick an initial
location for the READ_DATA port at this time. The
software then issues two reads to the ISOLATION
register for each bit in the serial identifier. If the
current bit is a ’1’, then the PnP board is expected
to return 0x55 on the first read, and 0xAA on the
second. If the current bit is a ’0’, then the PnP logic
will drive nothing on the bus, but will instead
observe the bus to see if another card is driving the
0x55, 0xAA pattern. If it does see that pattern for
the two reads, then that card must put itself back
into the Sleep state. This ensures that only one PnP
card will be in the Isolation state at the end of the
protocol.
The PnP software will recognize the 0x55, 0xAA
pattern as a ’1’ for that bit position, and any other
pattern as a ’0’. Once all 72 bits have been read,
the PnP software will then verify that the checksum
matches the data. If it does, then the software will
assign a unique, non-zero CSN to the one card that
made it to the end of the protocol. This will cause
that one card to transistion to the Configuration
state. If the checksum does not match, then the
software will move the location of the READ_DATA
port, and start the protocol over.
6.8.2.2
The Isolation protocol ensures that only one card
can be in the Configuration state at a time. This
makes it possible to read out the resource string
byte-serially when in this state. This is done through
the Resource_Data Register (location 0x04), after
polling the status bit (location 0x05, bit 0) to make
sure the data in the register is valid. The PnP
software will use this method to read the entire
resource string from the PnP card. This string lists
the resource requirements of the card, along with
what the card is capable of using (see section 6.8.5
for more on the resource string). The software
repeats this process with all of the PnP cards in the
system, and thus obtains an image of all of the
resource requirements in the system. The software
then arbitrates the available resources to meet the
needs of each card. If a configuration can be found,
then the assigned configuration for each card will
be written to the cards. The software then activates
the card by setting the Activate bit (location 0x30,
bit 0). On the 83C795, this causes the software to
transfer the appropriate settings in the PnP
configuration registers to the 83C 795’s
configuration registers by way of a shift chain. Once
this transfer is complete, the rest of the logic in the
83C795 becomes active.
Configuration And Activation
6.8.3
Figure 6-8 contains a map showing all of the
configuration registers implemented by the
83C795. This figure also illustrates the relationship
between the auto-configuration ports, the PnP
secondary address space, and the resource string.
Configuration Registers
Most of the configuration registers can only be
accessed when the PnP state machine is in certain
states. Any unused registers or bits in the PnP
register space must return zeros when read. The
HOST INTERFACE SECTION
83C795
59
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