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5.2.29 RSTOP - Receive Stop Page Register
Normal Map Read Port = 2:12
Normal Map Write Port = 0:12
The Receive Stop Page Register points to the first
address beyond the last receive buffer in the ring
before wrapping around to the RSTART buffer. Only
A08-A15 are specified since all buffers are aligned
on 256-byte boundaries.
BIT
7
6
5
4
3
2
1
0
RSTOP
RESET
X
X
X
X
X
X
X
X
A15
A14
A13
A12
A11
A10
A09
A08
5.2.30 RTABH - Receive Buffer Table Pointer
High Register
Linked-List Map Read/Write Port = 0:19
This register contains the upper 8 bits for the
register pair used as a pointer to the receive buffer
descriptors table. These registers should be
initialized to the same value as the RBEGIN register
when the descriptor table is created and thereafter
left unaltered unless the receiver buffer pool is
rebuilt. For more information, refer to page 89.
BIT
7
6
5
4
3
2
1
0
RTABH
RESET
X
X
X
X
X
X
X
X
A15
A14
A13
A12
A11
A10
A09
A08
5.2.31 RTABL - Receive Buffer Table Pointer
Low Register
Linked-List Map Read/Write Port = 0:18
This register contains the lower 8 bits for the
register pair used as a pointer to the receive buffer
descriptors table. These registers should be
initialized to the same value as the RBEGIN register
when the descriptor table is created and thereafter
left unaltered unless the receiver buffer pool is
rebuilt. For more information, refer to page 89.
BIT
7
6
5
4
3
2
1
0
RTABL
RESET
X
X
X
X
X
X
X
X
A07
A06
A05
A04
A03
A02
A01
A00
5.2.32 STA0-STA5 - Station Address
Registers
STA
Register
Normal Map
Port Address
Read
1:11
1:12
1:13
1:14
1:15
1:16
Linked-List Map
Port Address
Read
1:11
1:12
1:13
1:14
1:15
1:16
Write
1:11
1:12
1:13
1:14
1:15
1:16
Write
1:11
1:12
1:13
1:14
1:15
1:16
STA0
STA1
STA2
STA3
STA4
STA5
These 6 registers hold the node’s individual station
address. Table 5-11 shows the bits defined for these
registers.
83C795
ETHERNET SYSTEM CONTROLLER REGISTERS
34