參數(shù)資料
型號: 83C795
廠商: SMSC Corporation
英文描述: Ethernet System Controller
中文描述: 以太網系統(tǒng)控制器
文件頁數(shù): 53/136頁
文件大?。?/td> 1996K
代理商: 83C795
5.2.48 RENH - Receive Enhancement Register
Normal Map Read/Write Port = 0:19
The Receive Enhancement Register contains
several bits required for the new receive features of
the 83C795 chip.
BIT
7
6
5
4
3
2
1
0
RENH
RESET
0
0
0
0
0
0
0
0
REMPTY
ERFBIT
WRAPEN
Bit 2: REMPTY
, Ring Bit Empty
When REMPTY = 1, this read-only bit indicates that
the receive buffer ring has no completely received
frames.
Bit 1: ERFBIT
, Early Receive Fail Bit
When ERFBIT = 1 it indicates that an underrun has
occurred during the reception of a frame. The host
clears this bit after reading the address where the
failure occurred from the ERFA Registers.
Bit 0: WRAPEN
, Automatic Ring-Wrap Enable
When WRAPEN = 1 it enables the auto-wrapping
feature. For more information on Automatic Ring-
Wrap, refer to page 87.
83C795
ETHERNET SYSTEM CONTROLLER REGISTERS
40
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