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Storage of User-Defined Initial Configurations
To define any of the 15 recallable configurations,
follow these steps.
1. Build an image of the desired configuration
registers in the LAN register bank (SWH=0,
addr=8:F).
2. Write the unlock/store sequence with the fi-
nal EA field of the EEROM register selecting
the desired configuration bank. Do not use
Bank 6 because that is reserved for the per-
manent device LAN address. Do not use
Bank 10 either because that is reserved for
driver-related information storage and can-
not be recalled as a board configuration.
3. Wait about 200 msec or poll the STORE bit
to determine whether that operation has
completed.
Storage of User-Defined LAN Address
To store a user-defined LAN address, follow these
steps.
1. Program the desired LAN address, board ID
register, and checksum register with desired
values.
2. Write the unlock store sequence with the final
EA field of EEROM register selecting the
Bank 6.
3. Wait about 200 msec or poll the STORE bit
to determine that operation has completed.
Storage of User-Defined Data
In some applications, there may be other data you
need to save in the EEROM, like board type and
revision numbers, multicast filter acceptance mask,
software driver parameters, and the host machine
type. Since some EEROM locations may not be
needed for configuration or LAN address storage,
they can be used for this purpose.
1. Overwrite LAN address, board ID, and
checksum registers with the data you need
to save.
2. Store the data as if it were a board configu-
ration. The driver setup program uses this
method to store driver related parameters
into EEROM Bank 10.
To recall this user defined data, program the EA
field for the bank and do a Recall operation.
6.8
The 83C795 supports the Plug and Play ISA
Specification. This specification provides full and
interactive configuration of all PnP-compliant
boards installed on the ISA bus. The essential steps
in this process are the abilities to:
Power up and reset Plug and Play devices
Send out an initiation key to bring all PnP de-
vices into a known state
Isolate each ISA adapter in turn
Read the adapter’s resource requirements
Arbitrate the available resources to all of the
PnP cards
Identify each board and configure its resources
Activate the cards on the ISA bus
Locate a suitable driver for the adapter, if nec-
essary
To be effective in this new environment, the 83C795
contains the logic necessary to prepare any board
on which it is placed for Plug and Play standards.
This logic will be active only when both the PNPEN
bit (ERFAL.0 as read from EEROM) is set and a
3.6k
resistor is connected to the MA[6] pin (J MP6)
between MA6 and GND.
PLUG AND PLAY
This section contains a brief overview of how Plug
and Play works, along with information specific to
the 83C795’s implementation of PnP. For more
detail on the Plug and Play process and protocol,
please refer to the latest version of the Plug and
Play ISA Specification
6.8.1
The Plug and Play protocol requires that all logic
not related to PnP on a PnP board not respond to
any ISA bus access until the PnP logic activates the
card, except for devices required for boot (see
Section 6.8.5). Until this happens, the only access
to the card is through the PnP auto-configurations
ports. These ports consist of three 8-bit I/O
registers, as shown in Table 6-6.
Auto-Configuration Ports
HOST INTERFACE SECTION
83C795
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