參數(shù)資料
型號: 83C795
廠商: SMSC Corporation
英文描述: Ethernet System Controller
中文描述: 以太網(wǎng)系統(tǒng)控制器
文件頁數(shù): 33/136頁
文件大小: 1996K
代理商: 83C795
BIT
IAR
RESET
0
0
0
0
1
0
0
0
INIT
7
6
5
4
3
2
1
0
IA15
IA14
IA13
IA8
IA7
IA6
IA5
PNPBOOT
0
0
0
0
1
0
0
0
Bits 7-5: IA15-IA13
, I/O Address Lines
These bits are compared against the A15-A13 lines
from the host when IOR or IOW are active and AEN
is not. To access the chip, the lines must match.
Bits 4-1: IA8-IA5
, I/O Address Lines
These bits are compared against the A8-5 lines
from the host when IOR or IOW are active and AEN
is not. To access the chip, the lines must match.
Bit 0: PNPBOOT,
Plug and Play Boot Bit
PNPBOOT = 1 to indicate to the Plug and Play
hardware that the adapter is a boot card. This
allows the 83C795 address decoders to be active
without waiting for the Plug and Play hardware
activate command.
5.1.14 RAR - RAM Address Register
Read/Write Port = OB SWH=1
This register controls the base address and window
size for the buffer RAM.
BIT
RAR
RESET
0
0
0
0
0
1
0
0
INIT
7
6
5
4
3
2
1
0
HRAM
RA17
RAMSZ1
RAMSZ0
RA16
RA15
RA14
RA13
0
0
0
0
0
1
0
0
Bit 7: HRAM
, High RAM Address
This bit provides a means of locating the buffer
memory above the 1MB DOS limit. When HRAM =
0, the buffer address decoder matches LA23-LA20
against zero. When HRAM = 1, the LA23-LA20
lines are matched against the value F. This field is
not supported by the Plug and Play hardware.
Bits 5-4: RAMSZ1-RAMSZ0
, Buffer Window Size
Field
This encoded field determines the apparent size of
the buffer RAM. It is decoded in the following man-
ner:
SZ1
SZ0
Window Size
8K Bytes
16K Bytes
32K Bytes
64K Bytes
0
0
1
1
0
1
0
1
TABLE 5-5. BUFFER WINDOW SIZE FIELD
Bits 6, 3-0: RA17, RA16-RA13
, RAM Base
Address Field
These bits form part of the base address for the
buffer RAM decoder along with the fixed value of
’11’ for RA19-RA18. When SA19-SA13 has a value
between this base address and the base plus the
window size, the request for memory is recognized.
Once the SA19-SA13 value is no longer in this
range, the host ends the access.
Note
The 64K window size is not supported
by Plug and Play.
5.1.15 BIO - ROM Control Register
Read/Write Port = 0C SWH = 1
This register programs the base address and
window size for the external ROM.
BIT
7
6
5
4
3
2
1
0
BIO
RESET
0
0
1
1
0
0
0
0
INIT
0
0
1
1
0
0
0
0
RECALL
EE
EE
EE
EE
EE
EE
EE
EE
FINE16
BA17
BIOSZ1
BIOSZ0
BA16
BA15
BA14
BA13
83C795
ETHERNET SYSTEM CONTROLLER REGISTERS
20
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