參數(shù)資料
型號(hào)： 28F640J5
英文描述： Dual-Slot, PCMCIA Analog Power Controller
中文描述： 28F640J5 -英特爾StrataFlash內(nèi)存技術(shù)，32和64兆比特
文件頁(yè)數(shù)： 26/53頁(yè)
文件大小： 306K
代理商： 28F640J5
INTEL
StrataFlash MEMORY TECHNOLOGY, 32 AND 64 MBIT
E
26
PRELIMINARY
Table 12. Primary Vendor-Specific Extended Query
(Continued)
Offset
(1)
Length
(bytes)
Description
Intel
StrataFlash
Memory
(P +C)h
01h
V
CC
Optimum Program/Erase voltage (highest
performance)
bits 7
–4
bits 3–0
BCD value in volts
BCD value in 100 millivolts
3D:
0050h
(P +D)h
01h
V
PP
[Programming] Optimum Program/Erase voltage
bits 7–4
bits 3–0
HEX value in volts
BCD value in 100 millivolts
Note: This value is 0000h; no V
PP
pin is present
3E:
0000h
(P +E)h
reserved
Reserved for future use
NOTE:
1. The Primary Vendor-Specific Extended Query table (P) address may change among SCS-compliant devices. Software
should retrieve this address from address 15 to guarantee compatibility with future SCS-compliant devices.
4.3
Read Identifier Codes
Command
The identifier code operation is initiated by writing
the Read Identifier Codes command. Following the
command write, read cycles from addresses shown
in Figure 6 retrieve the manufacturer, device, block
lock configuration and master lock configuration
codes (see Table 13 for identifier code values). To
terminate the operation, write another valid
command. Like the Read Array command, the
Read
Identifier
Codes
independently of the V
PEN
voltage and RP# can be
V
IH
or V
HH
. This command is valid only when the
WSM is off or the device is suspended. Following
the Read Identifier Codes command, the following
information can be read:
command
functions
Table 13. Identifier Codes
(1)
Code
Address
(1)
00000
00001
00001
X
0002
(2)
Data
(00) 89
(00) 14
(00) 15
Manufacture Code
Device Code
32-Mbit
64-Mbit
Block Lock Configuration
Block Is Unlocked
Block Is Locked
Reserved for Future Use
Master Lock Configuration
Device Is Unlocked
Device Is Locked
Reserved for Future Use
NOTE:
1.
A
is not used in either x8 or x16 modes when obtaining
the identifier codes. The lowest order address line is A
1
.
Data is always presented on the low byte in x16 mode
(upper byte contains 00h).
2.
X selects the specific block’s lock configuration code.
See Figure 6 for the device identifier code memory
map.
DQ
0
= 0
DQ
0
= 1
DQ
1
–7
00003
DQ
0
= 0
DQ
0
= 1
DQ
1–7
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F640L18 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash Wireless Memory
28F640L30 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel StrataFlash㈢ Wireless Memory with 3.0-Volt I/O (L30)
28F640P3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
28F640W30 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
28F650 制造商:Cinch Connectors 功能描述:1 Lug Terminal Strip
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