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參數(shù)資料
| 型號(hào)： | 28F640J5 |
| 英文描述： | Dual-Slot, PCMCIA Analog Power Controller |
| 中文描述： | 28F640J5 -英特爾StrataFlash內(nèi)存技術(shù)，32和64兆比特 |
| 文件頁數(shù)： | 18/53頁 |
| 文件大?。?/td> | 306K |
| 代理商： | 28F640J5 |
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INTEL
StrataFlash MEMORY TECHNOLOGY, 32 AND 64 MBIT
E
Read Array Command
18
PRELIMINARY
4.1
Upon initial device power-up and after exit from
reset/power-down mode, the device defaults to read
array mode. This operation is also initiated by
writing the Read Array command. The device
remains enabled for reads until another command
is written. Once the internal WSM has started a
block erase, program, or lock-bit configuration, the
device will not recognize the Read Array command
until the WSM completes its operation unless the
WSM is suspended via an Erase Suspend
command. The Read Array command functions
independently of the V
PEN
voltage and RP# can be
V
IH
or V
HH
.
4.2
Read Query Mode Command
This section defines the data structure or
“database” returned by the SCS (Scaleable
Command Set) Query command. System software
should parse this structure to gain critical
information to enable programming, block erases,
and otherwise control the flash component. The
SCS Query is part of an overall specification for
multiple command set and control interface
descriptions called Common Flash Interface, or
CFI. The Query can only be accessed when the
WSM is off or the device is suspended.
4.2.1
QUERY STRUCTURE OUTPUT
The Query “database,” described later, allows
system software to gain critical information for
controlling the flash component. This section
describes the device’s CFI-compliant interface that
allows the host system to access Query data.
Query data are always presented on the lowest-
order data outputs DQ
0
–DQ
7
only. The Query table
device starting address is a 10h word address.
The first two bytes of the Query structure, “Q” and
”R” in ASCII, appear on the low byte at word
addresses 10h and 11h. This CFI-compliant device
outputs 00H data on upper bytes. Thus, the device
outputs ASCII “Q” in the low byte DQ
0
–DQ
7
and
00h in the high byte DQ
8
–DQ
15
.
Since the device is x8/x16 capable, the x8 data is
still presented in word-relative (16-bit) addresses.
However, the “fill data” (00h) is not the same as
driven by the upper bytes in the x16 mode. As in
x16 mode, the byte address (A
0
or A
1
depending on
pinout) is ignored for Query output so that the “odd
byte address” (A
0
or A
1
high) repeats the “even byte
address” data (A
0
or A
1
low). Therefore, in x8 mode
using byte addressing, the device will output the
sequence “Q,” “Q,” “R,” “R,” “Y,” “Y,” and so on,
beginning at byte-relative address 20h (which is
equivalent to word offset 10h in x16 mode).
In Query addresses where two or more bytes of
information are located, the least significant data
byte is presented on the lower address, and the
most significant data byte is presented on the
higher address.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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