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XRT86VL30
159
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 137: LIU CHANNEL CONTROL ARBITRARY REGISTER 3 (LIUCCAR3)
HEX ADDRESS: 0X0F0A
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6-0
Arb_seg3
R/W
0
Arbitrary Transmit Pulse Shape, Segment 3
These seven bits form the third of the eight segments of the transmit
shape pulse when the XRT86VL30 is configured in “Arbitrary Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
NOTE: Arbitrary mode is enabled by writing to the EQC[4:0] bits in
register 0x0F00.
TABLE 138: LIU CHANNEL CONTROL ARBITRARY REGISTER 4 (LIUCCAR4)
HEX ADDRESS: 0X0F0B
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6-0
Arb_seg4
R/W
0
Arbitrary Transmit Pulse Shape, Segment 4
These seven bits form the forth of the eight segments of the transmit
shape pulse when the XRT86VL30 is configured in “Arbitrary Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0x0F00.
TABLE 139: LIU CHANNEL CONTROL ARBITRARY REGISTER 5 (LIUCCAR5)
HEX ADDRESS: 0X0F0C
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
R/W
0
6-0
Arb_seg5
R/W
0
Arbitrary Transmit Pulse Shape, Segment 5
These seven bits form the fifth of the eight segments of the transmit
shape pulse when the XRT86VL30 is configured in “Arbitrary Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0x0F00.