TABLE
參數(shù)資料
型號(hào)： XRT86VL30IV-F
廠商： Exar Corporation
文件頁數(shù)： 112/175頁
文件大?。?/td> 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 128LQFP
標(biāo)準(zhǔn)包裝： 72
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤
其它名稱： 1016-1485
XRT86VL30IV-F-ND
XRT86VL30
36
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 22: DMA 0 (WRITE) CONFIGURATION REGISTER (D0WCR)
HEX ADDRESS: 0X0118
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
DMA0 RST
R/W
0
DMA_0 Reset
This bit resets the transmit DMA (Write) channel 0.
0 = Normal operation.
1 = A zero to one transition resets the transmit DMA (Write) channel 0.
6
DMA0 ENB
R/W
0
DMA_0 Enable
This bit enables the transmit DMA_0 (Write) interface. After a transmit
DMA is enabled, DMA transfers are only requested when the transmit
buffer status bits indicate that there is space for a complete message
or cell.
The DMA write channel is used by the external DMA controller to
transfer data from the external memory to the HDLC buffers within the
T1 Framer. The DMA Write cycle starts by T1 Framer asserting the
DMA Request (REQ0) ‘low’, then the external DMA controller should
drive the DMA Acknowledge (ACK0) ‘low’ to indicate that it is ready to
start the transfer. The external DMA controller should place new data
on the Microprocessor data bus each time the Write Signal is Strobed
low if the WR is configured as a Write Strobe. If WR is configured as a
direction signal, then the external DMA controller would place new
data on the Microprocessor data bus each time the Read Signal (RD)
is Strobed low.
0 = Disables the transmit DMA_0 (Write) interface
1 = Enables the transmit DMA_0 (Write) interface
5
WR TYPE
R/W
0
Write Type Select
This bit selects the function of the WR signal.
0 = WR functions as a direction signal (indicates whether the current
bus cycle is a read or write operation) and RD functions as a data
strobe signal.
1 =WR functions as a write strobe signal
4 - 3 Reserved
-
Reserved
2
DMA0_CHAN(2)
R/W
0
Channel Select
These three bits select which T1 channel within the XRT86VL30 uses
the Transmit DMA_0 (Write) interface.
000 = Channel 0
001 = Reserved
001 = Channel 2
011 = Reserved
1xx = Reserved
1
DMA0_CHAN(1)
R/W
0
DMA0_CHAN(0)
R/W
0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL30IV-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
XRT86VL32 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL32_07 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL32_0709 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
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