參數(shù)資料
型號(hào)： XRT86VL30IV-F
廠商： Exar Corporation
文件頁數(shù)： 42/175頁
文件大?。?/td> 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 128LQFP
標(biāo)準(zhǔn)包裝： 72
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤
其它名稱： 1016-1485
XRT86VL30IV-F-ND
XRT86VL30
131
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
3
RxEOT
RUR/
WC
0
Receive HDLC3 Controller End of Reception (RxEOT) Interrupt
Status
This Reset-Upon-Read bit indicates whether or not the Receive
HDLC3 Controller End of Reception (RxEOT) Interrupt has occurred
since the last read of this register. Receive HDLC3 Controller will
declare this interrupt once it has completely received a full data link
message, or once the buffer is full.
0 = Receive HDLC3 Controller End of Reception (RxEOT) interrupt has
not occurred since the last read of this register
1 = Receive HDLC3 Controller End of Reception (RxEOT) Interrupt has
occurred since the last read of this register
2
FCS Error
RUR/
WC
0
FCS Error Interrupt Status
This Reset-Upon-Read bit indicates whether or not the FCS Error Inter-
rupt has occurred since the last read of this register. Receive HDLC3
Controller will declare this interrupt when it has detected the FCS error
in the most recently received data link message.
0 = FCS Error interrupt has not occurred since the last read of this reg-
ister
1 = FCS Error interrupt has occurred since the last read of this register
1
Rx ABORT
RUR/
WC
0
Receipt of Abort Sequence Interrupt Status
This Reset-Upon-Read bit indicates whether or not the Receipt of Abort
Sequence interrupt has occurred since last read of this register.
Receive HDLC3 Controller will declare this interrupt if it detects the
Abort Sequence (i.e. a string of seven (7) consecutive 1’s) in the
incoming data link channel.
0 = Receipt of Abort Sequence interrupt has not occurred since last
read of this register
1 = Receipt of Abort Sequence interrupt has occurred since last read of
this register
0
RxIDLE
RUR/
WC
0
Receipt of Idle Sequence Interrupt Status
This Reset-Upon-Read bit indicates whether or not the Receipt of Idle
Sequence interrupt has occurred since the last read of this register.
The Receive HDLC3 Controller will declare this interrupt if it detects the
flag sequence octet (0x7E) in the incoming data link channel. If RxI-
DLE "AND" RxEOT occur together, then the entire HDLC message has
been received.
0 = Receipt of Idle Sequence interrupt has not occurred since last read
of this register
1 = Receipt of Idle Sequence interrupt has occurred since last read of
this register.
TABLE 116: DATA LINK STATUS REGISTER 3 (DLSR3)
HEX ADDRESS: 0X0B26
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
相關(guān)PDF資料
PDF描述
XRT86VL32IB-F IC LIU/FRAMER T1/E1/J1 2CH 225BG
XRT86VL34IB-F IC LIU/FRAMER T1/E1/J1 4CH 225BG
XRT86VL38IB484-F IC LIU/FRAMER T1/E1/J1 8CH 484BG
XRT86VX38IB329-F IC TI/E1/J1 FRAMER/LIU 329FPBGA
XRT94L31IB-L IC MAPPER DS3/E3/STS-1 504TBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL30IV-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
XRT86VL32 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL32_07 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL32_0709 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL32_1 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*