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參數(shù)資料
| 型號： | XRT86VL30IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 172/175頁 |
| 文件大小： | 0K |
| 描述： | IC FRAMR/LIU T1/E1/J1 QD 128LQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 控制器類型： | T1/E1/J1 調(diào)幀器，LIU |
| 電源電壓： | 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1485 XRT86VL30IV-F-ND |
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XRT86VL30
91
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 74: LAPD BUFFER 0 CONTROL REGISTER (LAPDBCR0)
HEX ADDRESS: 0X0600
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
LAPD Buffer 0
R/W
0
LAPD Buffer 0 (96-Bytes) Auto Incrementing
This register is used to transmit and receive LAPD messages within
buffer 0 of the HDLC controller. Any one of the three HDLC control-
ler can be chosen in the LAPD Select Register (0x011B). Users
should determine the next available buffer by reading the BUFAVAL
bit (bit 7 of the Transmit Data Link Byte Count Register 1 (address
0x0114), Register 2 (0x0144) and Register 3 (0x0154) depending on
which HDLC controller is selected. If buffer 0 is available, writing to
buffer 0 will insert the message into the outgoing LAPD frame after
the LAPD message is sent and the data from the transmit buffer
cannot be retrieved.
After detecting the Receive end of transfer interrupt (RxEOT), users
should read the RBUFPTR bit (bit 7 of the Receive Data Link Byte
Count Register 1 (address 0x0115), Register 2 (0x0145), or Regis-
ter 3 (0x0155) depending on which HDLC controller is selected) to
determine which buffer contains the received LAPD message ready
to be read. If RBUFPTR bit indicates that buffer 0 is available to be
read, reading buffer 0 (Register 0x0600) continuously will retrieve
the entire received LAPD message.
NOTE:
When writing to or reading from Buffer 0, the register is
automatically incremented such that the entire 96 Byte
LAPD message can be written into or read from buffer 0
(Register 0x0600) continuously.
TABLE 75: LAPD BUFFER 1 CONTROL REGISTER (LAPDBCR1)
HEX ADDRESS: 0X0700
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
LAPD Buffer 1
R/W
0
LAPD Buffer 1 (96-Bytes) Auto Incrementing
This register is used to transmit and receive LAPD messages within
buffer 1 of the HDLC controller. Any one of the three HDLC control-
ler can be is chosen in the LAPD Select Register (0x011B). Users
should determine the next available buffer by reading the BUFAVAL
bit (bit 7 of the Transmit Data Link Byte Count Register 1 (address
0x0114), Register 2 (0x0144) and Register 3 (0x0154) depending on
which HDLC controller is selected. If buffer 1 is available, writing to
buffer 1 will insert the message into the outgoing LAPD frame after
the LAPD message is sent and the data from the transmit buffer 1
cannot be retrieved.
After detecting the Receive end of transfer interrupt (RxEOT), users
should read the RBUFPTR bit (bit 7 of the Receive Data Link Byte
Count Register 1 (address 0x0115), Register 2 (0x0145), or Regis-
ter 3 (0x0155) depending on which HDLC controller is selected) to
determine which buffer contains the received LAPD message ready
to be read. If RBUFPTR bit indicates that buffer 1 is available to be
read, reading buffer 1 (Register 0x0700) continuously will retrieve
the entire received LAPD message.
NOTE:
When writing to or reading from Buffer 0, the register is
automatically incremented such that the entire 96 Byte
LAPD message can be written into or read from buffer 0
(Register 0x0600) continuously.
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| XRT86VL30IV-F | 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC |
| XRT86VL32 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
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