TABLE
參數(shù)資料
型號： XRT86VL30IV-F
廠商： Exar Corporation
文件頁數(shù)： 18/175頁
文件大小： 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 128LQFP
標(biāo)準(zhǔn)包裝： 72
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤
其它名稱： 1016-1485
XRT86VL30IV-F-ND
XRT86VL30
109
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 99: FRAMER INTERRUPT ENABLE REGISTER (FIER)
HEX ADDRESS: 0X0B05
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
5
SIG_ENB
R/W
0
Change in Signaling Bits Interrupt Enable
This bit permits the user to either enable or disable the “Change in Sig-
naling Bits” Interrupt, within the XRT86VL30 device. If the user enables
this interrupt, then the Receive T1 Framer block will generate an inter-
rupt when it detects a change in the any four signaling bits (A,B,C,D) in
any one of the 24 signaling channels. Users can read the signaling
change registers (address 0x010D-0x010F) to determine which signal-
ling channel has changed state.
0 - Disables the Change in Signaling Bits Interrupt
1 - Enables the Change in Signaling Bits Interrupt
NOTE: This bit has no meaning when Robbed-Bit Signaling is disabled.
4
COFA_ENB
R/W
0
Change of Framing Alignment (COFA) Interrupt Enable
This bit permits the user to either enable or disable the “Change in FAS
Framing Alignment (COFA)” Interrupt, within the XRT86VL30 device. If
the user enables this interrupt, then the Receive T1 Framer block will
generate an interrupt when it detects a Change of Framing Alignment
Signal (e.g., the Framing bits have appeared to move to a different
location within the incoming T1 data stream).
0 - Disables the “Change of Framing Alignment (COFA)” Interrupt.
1 - Enables the “Change of Framing Alignment (COFA)” Interrupt.
3
OOF_ENB
R/W
0
Change in Out of Frame Defect Condition interrupt enable
This bit permits the user to either enable or disable the “Change in Out
of Frame Defect Condition” Interrupt, within the XRT86VL30 device. If
the user enables this interrupt, then the Receive T1 Framer block will
generate an interrupt in response to either one of the following condi-
tions.
1. The instant that the Receive T1 Framer block declares the Out of
Frame defect condition.
2. The instant that the Receive T1 Framer block clears the Out of
Frame defect condition.
0 – Disables the “Change in Out of Frame Defect Condition” Interrupt.
1 – Enables the “Change in Out of Frame Defect Condition” Interrupt.
2
FMD_ENB
R/W
0
Frame Mimic Detection Interrupt Enable
This bit permits the user to either enable or disable the “Frame Mimic
Detection” Interrupt, within the XRT86VL30 device. If the user enables
this interrupt, then the Receive T1 Framer block will generate an inter-
rupt when it detects the presence of Frame mimic bits (i.e., the payload
bits have appeared to mimic the framing bit pattern within the incoming
T1 data stream).
0 - Disables the “Frame Mimic Detection” Interrupt.
1 - Enables the “Frame Mimic Detection” Interrupt.
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參數(shù)描述
XRT86VL30IV-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
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XRT86VL32_0709 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
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