參數(shù)資料
型號(hào)： XRT86VL30IV-F
廠商： Exar Corporation
文件頁數(shù)： 120/175頁
文件大?。?/td> 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 128LQFP
標(biāo)準(zhǔn)包裝： 72
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤
其它名稱： 1016-1485
XRT86VL30IV-F-ND
XRT86VL30
44
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
1-0
TxIMODE[1:0]
R/W
00
Transmit Interface Mode selection
This bit determines the transmit interface speed. The exact function of these
two bits depends on whether Multiplexed mode is enabled or disabled.
Table 30 and Table 31 shows the functions of these two bits for non-multi-
plexed and multiplexed modes.:
TABLE 29: TRANSMIT INTERFACE CONTROL REGISTER (TICR)
HEX ADDRESS:0X0120
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
TABLE 30: TRANSMIT INTERFACE SPEED WHEN MULTIPLEXED MODE IS
DISABLED (TXMUXEN = 0)
TXIMODE[1:0]
TRANSMIT INTERFACE SPEED
00
1.544Mbit/s Base Rate Mode:
Transmit Backplane interface signals include:
TxSERCLK is an input or output clock at 1.544MHz
TxMSYNC is the superframe boundary at 3ms (ESF) or
1.5ms (SF)
TxSYNC is the single frame boundary at 125 us
TxSER is the base-rate data input
01
2.048Mbit/s (High-Speed MVIP Mode):
Transmit backplane interface signals include:
TxSERCLK is an input clock at 1.544MHz
TxMSYNC is the high speed input clock at 2.048MHz to
input high-speed data
TxSYNC can be configured as a single frame or super-
frame boundary, depending on the setting of bit 5 of reg-
ister 0x0109
TxSER is the high-speed data input
10
4.096Mbit/s High-Speed Mode:
Transmit Backplane interface signals include:
TxSERCLK is an input clock at 1.544MHz
TxMSYNC will become the high speed input clock at
4.096MHz to input high-speed data
TxSYNC can be configured as a single frame or super-
frame boundary, depending on the setting of bit 5 of reg-
ister 0x0109
TxSER is the high-speed data input
11
8.192Mbit/s High-Speed Mode:
Transmit Backplane interface signals include:
TxSERCLK is an input clock at 1.544MHz
TxMSYNC will become the high speed input clock at
8.192MHz to input high-speed data
TxSYNC can be configured as a single frame or super-
frame boundary, depending on the setting of bit 5 of reg-
ister 0x0109
TxSER is the high-speed data input
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參數(shù)描述
XRT86VL30IV-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
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