
XRT84L38
192
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
The table below shows the combinations of Transmit Multiplex Enable bit and Transmit Interface Mode Select
[1:0] bits and the resulting Transmit Back-plane Interface data rates.
T
ABLE
38: T
RANSMIT
M
ULTIPLEX
E
NABLE
BIT
AND
T
RANSMIT
I
NTERFACE
M
ODE
S
ELECT
[1:0]
BITS
WITH
THE
RESULTING
T
RANSMIT
B
ACK
-
PLANE
I
NTERFACE
DATA
RATES
When the Transmit Multiplex Enable bit is set to zero, the framer is configured in non-channel-multiplexed mode.
The possible data rates are 1.544Mbit/s, MVIP 2.048Mbit/s, 4.096Mbit/s and 8.192Mbit/s. In non-channel-
multiplexed mode, payload data of each channel are taken from the Terminal Equipment separately. Each
channel uses its own Transmit Serial Clock, Transmit Serial Data, Transmit Single-frame Synchronization signal
and Transmit Multi-frame Synchronization signal as interface between the framer and the Terminal Equipment.
Section 4.1.2.1, 4.1.2.2 and 4.1.2.3 provide details on how to connect the Transmit Payload Data Interface block
with the Terminal Equipment when the Back-plane interface data rate is 1.544Mbit/s.
When the Back-plane interface data rate is MVIP 2.048Mbit/s, 4.096Mbit/s and 8.192Mbit/s, the Transmit Serial
Clock, Transmit Serial Data, Transmit Single-frame Synchronization signal and Transmit Multi-frame
Synchronization signal are all configured as inputs. The Transmit Serial Clock is always an input clock with
frequency of 1.544 MHz for all data rates. The TxMSync_n signal is configured as the Transmit Input Clock with
frequencies of 2.048 MHz, 4.096 MHz and 8.192 MHz respectively. It serves as the primary clock source for the
High-speed Back-plane Interface.
The table below summaries the clock frequencies of TxSerClk_n and TxInClk_n inputs when the framer is
operating in non-multiplexed High-speed Back-plane mode.
When the Transmit Multiplex Enable bit is set to one, the framer is configured in channel-multiplexed mode. The
possible data rates are multiplexed 12.352Mbit/s, bit-multiplexed 16.384Mbit/s, HMVIP 16.384Mbit/s and H.100
16.384Mbit/s. In channel-multiplexed mode, every four channels share the Transmit Serial Data and Transmit
Single-frame Synchronization signal of one channel as interface between the framer and the local Terminal
Equipment. The TxMSync_n signal of one channel is configured as the Transmit Input Clock with frequencies of
12.352 MHz or 16.384. It serves as the primary clock source for the High-speed Back-plane Interface.
T
RANSMIT
M
ULTIPLEX
E
NABLE
B
IT
T
RANSMIT
I
NTERFACE
M
ODE
S
ELECT
B
IT
1
T
RANSMIT
I
NTERFACE
M
ODE
S
ELECT
B
IT
0
B
ACK
-
PLANE
I
NTERFACE
D
ATA
R
ATE
0
0
0
1.544Mbit/s
0
0
1
MVIP 2.048Mbit/s
0
1
0
4.096Mbit/s
0
1
1
8.192Mbit/s
1
0
0
Multiplexed 12.352Mbit/s
1
0
1
Bit Multiplexed 16.384Mbit/s
1
1
0
HMVIP 16.384Mbit/s
1
1
1
H.100 16.384Mbit/s
TRANSMIT MULTIPLEX ENABLE BIT = 0
T
RANSMIT
I
NTERFACE
M
ODE
S
ELECT
B
IT
1
T
RANSMIT
I
NTERFACE
M
ODE
S
ELECT
B
IT
0
B
ACK
-
PLANE
I
NTERFACE
D
ATA
R
ATE
T
X
S
ER
C
LK
T
X
MS
YNC
/T
X
I
N
C
LK
0
0
1.544Mbit/s
1.544 MHz
-
0
1
MVIP 2.048Mbit/s
1.544 MHz
2.048 MHz
1
0
4.096Mbit/s
1.544 MHz
4.096 MHz
1
1
8.192Mbit/s
1.544 MHz
8.192 MHz