TABLE 60:
參數(shù)資料
型號： XRT72L71IQ
廠商： Exar Corporation
文件頁數(shù)： 76/102頁
文件大?。?/td> 0K
描述： IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告： XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝： 24
控制器類型： DS3 ATM UNI，透明通道調(diào)幀器
電源電壓： 3.3V
電流 - 電源： 120mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 160-BQFP
供應(yīng)商設(shè)備封裝： 160-PQFP（28x28）
包裝： 托盤
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
71
TABLE 60: PMON TRANSMIT VALID CELL COUNT - LSB
REGISTER 59
PMON TRANSMIT VALID CELL COUNT - LSB
HEX ADDRESS: 0X3B
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
Tx Valid Cell Count Low-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Transmit Valid Cell Count -
MSB contains the 16 bit value for the total number of Valid cells that have
been trnasmitted by the Transmit Cell Processor, since the last read of this
register. This register contains the “Low” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
TABLE 61: PMON HOLDING REGISTER
REGISTER 60
PMON HOLDING REGISTER
HEX ADDRESS: 0X3C
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
PMON Hold Value
RO
0x00
If the Bi-directional data bus (of the Microprocessor Interface) is configured
to be “8-bits” wide; then this register holds the companion byte of any 16-bit
PMON Count registers, 1-sec Accumulator registers, or the Test Cell Error
Accumulator register, when one of these registers are read, during the previ-
ous Bus cycle.
TABLE 62: ONE SECOND ERROR STATUS REGISTER
REGISTER 61
ONE SECOND ERROR STATUS REGISTER
HEX ADDRESS: 0X3D
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-2
Unused
RO
0
1
Errored Second
RO
0
0: No errors were detected during last one second accumulation interval
1: At least one error was detected during last one second accumulation inter-
val
0
Severe Errored Second
RO
0
0: Error rate did not exceed 1 in
10,000 in last one second interval
1: Error rate in lat one second interval was greater than 1 in
10,000
TABLE 63: LCV - ONE SECOND ACCUMULATOR REGISTER - MSB
REGISTER 62
LCV - ONE SECOND ACCUMULATOR REGISTER - MSB
HEX ADDRES: 0X3E
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
LCV 1Sec High-byte
RO
0x00
This “Read-Only” register, along with “LCV - One Second Accumulator Reg-
ister - LSB” contains a 16 bit value of the total number of Line Code Viola-
tions that have been detected within the last “one-second” accumulation
interval. This register contains the “High” byte value of this expression.
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