TABLE 35:
參數(shù)資料
型號(hào)： XRT72L71IQ
廠(chǎng)商： Exar Corporation
文件頁(yè)數(shù)： 69/102頁(yè)
文件大?。?/td> 0K
描述： IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告： XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝： 24
控制器類(lèi)型： DS3 ATM UNI，透明通道調(diào)幀器
電源電壓： 3.3V
電流 - 電源： 120mA
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 160-BQFP
供應(yīng)商設(shè)備封裝： 160-PQFP（28x28）
包裝： 托盤(pán)
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
65
TABLE 35: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
REGISTER 34
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X22
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
F Bit Error Count High-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - LSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “High” byte value of this 16-bit
expression.
TABLE 36: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
REGISTER 35
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
HEX ADDRESS: 0X23
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
F Bit Error Count low-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - MSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “Low” byte value of this 16-bit
expression.
TABLE 37: PMON P-BIT ERROR COUNT REGISTER - MSB
REGISTER 36
PMON P-BIT ERROR COUNT REGISTER - MSB
HEX ADDRESS: 0X24
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
P-Bit Error Count High-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - LSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “High” byte value of this 16-bit expression.
TABLE 38: PMON P-BIT ERROR COUNT REGISTER - LSB
REGISTER 37
PMON P-BIT ERROR COUNT REGISTER - LSB
HEX ADDRESS: 0X25
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
P-Bit Error Count Low-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - MSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “Low” byte value of this 16-bit expression.
TABLE 39: PMON FEBE EVENT COUNT REGISTER - MSB
REGISTER 38
PMON FEBE EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X26
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
FEBE Event Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON FEBE Event Count
Register - LSB” contains the 16 bit value for the total number of FEBE events
that have been detected since the last read of this register. This register
contains the “High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
support the “C-bit Parity” Framing format.
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