參數資料
| 型號： | XRT72L71IQ |
| 廠商： | Exar Corporation |
| 文件頁數： | 69/102頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRAMER DS3 ATM UNI 160PQFP |
| 產品變化通告： | XRT72Lx Series Obsolescence 02/May/2012 |
| 標準包裝： | 24 |
| 控制器類型： | DS3 ATM UNI，透明通道調幀器 |
| 電源電壓： | 3.3V |
| 電流 - 電源： | 120mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 160-BQFP |
| 供應商設備封裝： | 160-PQFP（28x28） |
| 包裝： | 托盤 |
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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
65
TABLE 35: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
REGISTER 34
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X22
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
F Bit Error Count High-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - LSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “High” byte value of this 16-bit
expression.
TABLE 36: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
REGISTER 35
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
HEX ADDRESS: 0X23
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
F Bit Error Count low-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - MSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “Low” byte value of this 16-bit
expression.
TABLE 37: PMON P-BIT ERROR COUNT REGISTER - MSB
REGISTER 36
PMON P-BIT ERROR COUNT REGISTER - MSB
HEX ADDRESS: 0X24
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
P-Bit Error Count High-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - LSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “High” byte value of this 16-bit expression.
TABLE 38: PMON P-BIT ERROR COUNT REGISTER - LSB
REGISTER 37
PMON P-BIT ERROR COUNT REGISTER - LSB
HEX ADDRESS: 0X25
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
P-Bit Error Count Low-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - MSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “Low” byte value of this 16-bit expression.
TABLE 39: PMON FEBE EVENT COUNT REGISTER - MSB
REGISTER 38
PMON FEBE EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X26
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
FEBE Event Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON FEBE Event Count
Register - LSB” contains the 16 bit value for the total number of FEBE events
that have been detected since the last read of this register. This register
contains the “High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
support the “C-bit Parity” Framing format.
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| XRT72L71IQ-F | 功能描述:網絡控制器與處理器 IC Single CH DS3 UNI (3.3V) RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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