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參數(shù)資料
型號: XRT72L71IQ
廠商: Exar Corporation
文件頁數(shù): 27/102頁
文件大?。?/td> 0K
描述: IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告: XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝: 24
控制器類型: DS3 ATM UNI,透明通道調(diào)幀器
電源電壓: 3.3V
電流 - 電源: 120mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 160-BQFP
供應(yīng)商設(shè)備封裝: 160-PQFP(28x28)
包裝: 托盤
XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
26
Receive PLCP Processor (Serial Output Port)—See Figure 13
t43
Clock Period of RxPOHClk signal
232
ns
t44
Delay from rising edge of RxPOHClk
signal to rising edge of RxPOHFrame
signal.
61.4
ns
t45
Delay from rising edge of RxPOHClk
to Data valid at RxPOH output
310
ns
t46
Bit period of data at RxPOH output
signal
232
ns
1 RxPOHClk pulse width
Receive Cell Processor (GFC Serial Output Port)—See Figure 14
t47
Clock Period of RxGFCClk
232
ns
t48
Delay from rising edge of RxGFCClk
to rising edge of RxGFCMSB pin.
0.06
1.4
ns
t49
Pulse width of RxGFCMSB signal
232
ns
t50
Delay from rising edge of RxGFCMSB
signal to first valid bit at RxGFC.
0ns
t51
Delay from rising edge of RxGFCClk
to valid bit at RxGFC.
0.9
2.4
ns
t52
Pulse width of Bit at RxGFC output.
232
ns
Receive UTOPIA Interface Block -- See Figure 15
t53
Delay time from rising edge of RxUClk
to Data Valid at RxUData[15:0]
19.9
16
ns
t54
Rx UTOPIA Read Enable setup time
to rising edge of RxUClk
4ns
t55
Delay time from rising edge of RxUClk
to valid RxUPrty bit
110
16
ns
t56
Delay time from rising edge of RxUClk
to valid RxUSoC bit
19.9
16
ns
t57
Delay time from Read Enable false to
Data Bus being tri-stated
111.5
16
ns
t58
Delay time from Read Enable false to
RxUPrty bit being tri-stated
112
16
ns
t59
Delay time from Read Enable false to
RxUSoC bit being tri-stated
111.5
16
ns
t60
RxUAddr[4:0] Setup Time to rising
edge of RxUClk
4ns
t61
RxUAddr[4:0] Hold Time from rising
edge of RxUClk
1ns
t62
RxUClav signal valid (not Hi-Z) from
first RxUClk rising edge of valid and
correct TxUAddr[4:0]
17.8
16
ns
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
Test Conditions: TA = 25°C, VDD = 3.3V ± 5% unless otherwise specified
SYMBOL
PARAMETER
MIN.TYP.MAX.UNITS
CONDITIONS
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