
XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
62
TABLE 29: TX DS3 FEAC CONFIGURATION AND STATUS REGISTER
REGISTER 28
TX DS3 FEAC CONFIGURATION AND STATUS REGISTER
HEX ADDRESS: 0X1C
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-5
Unused
RO
0
4
Tx FEAC Interrupt Enable
R/W
0
0: Disables the “Transmit FEAC” Interrupt.
1: Enables the “Transmit FEAC” Interrupt.
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing format.
3
Tx FEAC Interrupt Status
RUR
0
0: Indicates that the “Transmit FEAC” Interrupt has not occurred since the
last read of this register.
1: Indicates that the “Transmit FEAC” Interrupt request has occurred since
the last read of this register.
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing format.
2
Tx FEAC Enable
R/W
0
0: The Transmit FEAC Processor is disabled, and cannot be commanded to
transmit a FEAC Message to the remote terminal equipment.
1: The Transmit FEAC Processor is enabled, and is able to be commanded
to transmit FEAC Messages to the remote terminal equipment.
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing format.
1
Tx FEAC Go
R/W
0
0 to 1 transition within this bit-field commands the Transmit FEAC Processor
to begin its transmission of the FEAC Message, which resides within the
“TxFEAC” Register.
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing format.
0
Tx FEAC Busy
RO
0
0: Indicates that the Transmit FEAC Processor is NOT currently transmitting
a FEAC Message to the remote terminal equipment
1: Data from FEAC register is currently being transmitted to the remote ter-
minal equipment.
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing format.
TABLE 30: TX DS3 FEAC REGISTER
REGISTER 29
TX DS3 FEAC REGISTER
HEX ADDRESS 0X1D
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7Unused
RO
0
6
Tx FEAC (5)
R/W
1
Contains the value of the FEAC Code (or Message) that is to be transmitted
to the remote terminal equipment. The LSB of this bit-field will be transmit-
ted first.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “C-bit Parity” Framing Format
5
Tx FEAC (4)
R/W
1
4
Tx FEAC (3)
R/W
1
3
Tx FEAC (2)
R/W
1
2
Tx FEAC (1)
R/W
1
Tx FEAC (0)
R/W
1
0Unused
RO
0