參數(shù)資料
型號(hào): W942504CH-7
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 64M X 4 DDR DRAM, 0.75 ns, PDSO66
封裝: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件頁數(shù): 3/45頁
文件大?。?/td> 1261K
代理商: W942504CH-7
W942504CH
Publication Release Date: February 14, 2003
- 11 -
Revision A1
AC Test Conditions
PARAMETER
SYMBOL
VALUE
UNIT
Input High Voltage (AC)
VIH
VREF + 0.31
V
Input Low Voltage (AC)
VIL
VREF - 0.31
V
Input Reference Voltage
VREF
0.5 x VDDQ
V
Termination Voltage
VTT
0.5 x VDDQ
V
Input Signal Peak to Peak Swing
VSWING
1.0
V
Differential Clock Input Reference Voltage
VR
Vx (AC)
V
Input Difference Voltage. CLK and CLK inputs (AC)
VID(AC)
1.5
V
Input Signal Minimum Slew Rate
SLEW
1.0
V/nS
Output timing Measurement Reference Voltage
VOTR
0.5 x VDDQ
V
V SWING (MAX)
VDDQ
VSS
T
VIH min (AC)
VREF
VIL max (AC)
SLEW = (VIH min (AC) - VILmax (AC)) / T
Output
RT= 50 ohms
VTT
A.C. TEST LOAD (A)
Z = 50 ohms
output
30pF
Measurement point
Notes:
(1)
Conditions outside the limits listed under "ABSOLUTE MAXIMUM RATINGS" may cause permanent damage to the
device.
(2)
All voltages are referenced to VSS, VSSQ.
(3)
Peak to peak AC noise on VREF may not exceed
±2% VREF(DC).
(4)
VOH = 1.95V, VOL = 0.35V
(5)
VOH = 1.9V, VOL = 0.4V
(6)
The values of IOH(DC) is based on VDDQ=2.3V and VTT = 1.19V.
The values of IOL(DC) is based on VDDQ=2.3V and VTT = 1.11V.
(7)
These parameters depend on the cycle rate and these values are measured at a cycle rate with the minimum values
of tCK and tRC.
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