參數(shù)資料
型號: W942504CH-7
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 64M X 4 DDR DRAM, 0.75 ns, PDSO66
封裝: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件頁數(shù): 27/45頁
文件大小: 1261K
代理商: W942504CH-7
W942504CH
Publication Release Date: February 14, 2003
- 33 -
Revision A1
Timing Waveforms, continued
Auto Precharge Timing (Read Cycle, CL = 2)
tRCD (READA)
≥ tRAS (min) – (BL/2) × tCK
AP
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
ACT
READA
ACT
Q0
Q1
Q2
Q3
ACT
READA
ACT
Q0
Q1
ACT
AP
READA
ACT
tRP
tRAS
CMD
DQS
DQ
CMD
DQS
DQ
CMD
DQS
DQ
BL=2
BL=4
BL=8
CLK
AP
Notes: CL2 shown; same command operation timing with CL = 2.5
In this case, the internal precharge operation begin after BL/2 cycle from READA command.
AP
represents the start of internal precharging .
The Read with Auto precharge command cannot be interrupted by any other command.
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