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參數(shù)資料
| 型號(hào)： | TSB41BA3AIGGM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
| 中文描述： | 的IEEE 1394b三端口電纜收發(fā)器/仲裁者 |
| 文件頁數(shù)： | 2/66頁 |
| 文件大?。?/td> | 895K |
| 代理商： | TSB41BA3AIGGM |
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SLLS618B JUNE 2004 REVISED AUGUST 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information
The TSB41BA3A provides the digital and analog transceiver functions needed to implement a three-port node
in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The
transceivers include circuitry to monitor the line conditions as needed for determining connection status, for
initialization and arbitration, and for packet reception and transmission. The TSB41BA3A is designed to
interface with a link-layer controller (LLC), such as the TSB82AA2, TSB12LV21, TSB12LV26, TSB12LV32,
TSB42AA4, TSB42AB4, TSB12LV01B, or TSB12LV01C. It may also be connected cable port to cable port to
an integrated 1394 Link + PHY layer such as the TSB43AB2.
The TSB41BA3A is powered by a single 3.3-V supply. The core voltage supply is supplied by an internal voltage
regulator to the PLLVDD-CORE and DVDD-CORE terminals. To protect the phase-locked loop (PLL) from
noise, the PLLVDD-CORE terminals must be separately decoupled from the DVDD-CORE terminals. The
PLLVDD-CORE terminals are decoupled with 1-
μ
F and smaller decoupling capacitors and the DVDD-CORE
terminals are separately decoupled with a 1-
μ
F and smaller decoupling capacitors. The separation between
DVDD-CORE and PLLVDD-CORE must be implemented by separate power supply rails or planes.
The TSB41BA3A may be powered by dual supplies, a 3.3-V supply for I/O and a core voltage supply. The core
voltage supply is supplied to the PLLVDD-CORE and DVDD-CORE terminals to the requirements in the
recommended operating conditions
section of this data sheet. The PLLVDD-CORE terminals must be
separated from the DVDD-CORE terminals, the PLLVDD-CORE terminals are decoupled with 1-
μ
F and smaller
decoupling capacitors and the DVDD-CORE terminals separately decoupled with 1-
μ
F and smaller decoupling
capacitors. The separation between DVDD-CORE and PLLVDD-CORE may be implemented by separate
power supply rails, or by a single power supply rail, where the DVDD-CORE and PLLVDD-CORE are separated
by a filter network to keep noise from the PLLVDD-CORE supply.
The TSB41BA3A requires an external 49.152-MHz crystal to generate a reference clock. The external clock
drives an internal phase-locked loop (PLL), which generates the required reference signal. This reference signal
provides the clock signals that control transmission of the outbound encoded information. A 49.152-MHz clock
signal is supplied by the PHY to the associated LLC for synchronization of the two devices and is used for
resynchronization of the received data when operating the PHY-link interface in compliance with the IEEE
1394a-2000 standard. A 98.304-MHz clock signal is supplied by the PHY to the associated LLC for
synchronization of the two devices when operating the PHY-link interface in compliance with the IEEE
1394b-2002 standard. The power down (PD) function, when enabled by asserting the PD terminal high, stops
operation of the PLL.
Data bits to be transmitted through the cable ports are received from the LLC on 2, 4, or 8 parallel paths
(depending on the requested transmission speed and PHY-link interface mode of operation). They are latched
internally, combined serially, encoded, and transmitted at 98.304, 122.78, 196.608, 245.76, 393.216, or
491.52 Mbits/s (referred to as S100, S100B, S200, S200B, S400, or S400B speed, respectively) as the
outbound information stream.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
0
°
C to 70
°
C
HTQFP - PFP
TSB41BA3APFP
40
°
C to 85
°
C
HTQFP - PFP
Micro Star
BGA CSP - GGM
TSB41BA3AIPFP
TSB41BA3AIGGM
TSB41BA3I
TSB41BA3I
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Micro Star is a trademark of Texas Instruments Incorporated.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB41BA3AIPFP | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFP | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFPG4 | 功能描述:1394 接口集成電路 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB41BA3ATPFPEP | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Mil Enh 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
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