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參數(shù)資料
| 型號： | TSB41BA3AIGGM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
| 中文描述： | 的IEEE 1394b三端口電纜收發(fā)器/仲裁者 |
| 文件頁數(shù)： | 10/66頁 |
| 文件大?。?/td> | 895K |
| 代理商： | TSB41BA3AIGGM |
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SLLS618B JUNE 2004 REVISED AUGUST 2004
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
TYPE
PFP
NO.
GGM
NO.
I/O
DESCRIPTION
LCLK_PMC
CMOS
7
K4
I
Link clock. Link-provided 98.304-MHz clock signal to synchronize data transfers from link to
the PHY. On hardware reset this terminal is sampled to determine the power management
control (PMC) mode.
LCLK_PMC
LPS
BMODE
H
L
H
n/c
lps
L
LCLK_PMC
lps
H
internal pulldown on LCLK_PMC
LCLK_PMC from LLC normally low during reset
In PMC mode, since no LLC is attached the data lines (D7D0) are available to indicate
power states. In PMC mode the following signals are output:
D0—port 0 cable-power disable (see Note 1)
D1—port 1 cable-power disable (port in sleep or disabled)
D2—port 2 cable-power disable (port in sleep or disabled)
D6—All ports cable-power disable (all ports in sleep/disable) logical AND of bits 02
D3D5 and D7 are reserved for future use.
Note 1: The cable-power disable is asserted when the port is either:
Hard-disabled (both the disabled and hard disabled bits are set)
Sleep-disabled (both the disabled and sleep_enable bits are set)
Disconnected
Asleep
Connected in DS mode, but nonactive (that is, suspended or disabled)
Otherwise, the cable-powered disable output is deasserted (that is, cable power
enabled) when the port is dc-connected or active. A bus holder is built into this terminal.
Mode
No LLC (PMC mode)
Legacy LLC
Beta LLC
LPS
CMOS
80
K1
I
Link power status input. This terminal monitors the active/power status of the link-layer
controller (LLC) and controls the state of the PHY-LLC interface. This terminal must be
connected to either the VDD supplying the LLC through an approximately 1-k
resistor or to a
pulsed output which is active when the LLC is powered. A pulsed signal must be used when
an isolation barrier exists between the LLC and PHY (see Figure 8).
The LPS input is considered inactive if it is sampled low by the PHY for more than a
LPS_RESET time (~2.6
μ
s), and is considered active otherwise (that is, asserted steady high
or an oscillating signal with a low time less than 2.6
μ
s). The LPS input must be high for at least
22 ns to be assured to be observed as high by the PHY.
When the TSB41BA3A detects that the LPS input is inactive, it places the PHY-LLC interface
into a low-power reset state. In the reset state, the CTL (CTL0 and CTL1) and D (D0 to D7)
outputs are held in the logic 0 state and the LREQ input is ignored; however, the PCLK output
remains active. If the LPS input remains low for more than a LPS_DISABLE time (~26
μ
s),
then the PHY-LLC interface is put into a low-power disabled state in which the PCLK output is
also held inactive.
The LLC state that is communicated in the self-ID packet is considered active only if both the
LPS input is active and the LCtrl register bit is set to 1. The LLC state that is communicated in
the self-ID packet is considered inactive if either the LPS input is inactive or the LCtrl register
bit is cleared to 0.
LREQ
CMOS
3
J3
I
LLC request input. The LLC uses this input to initiate a service request to the TSB41BA3A. A
bus holder is built into this terminal.
PCLK
CMOS
5
K3
O
PHY clock. Provides a 98.304-MHz clock signal, synchronized with data transfers, to the LLC
when the PHY-link interface is operating in the 1394b mode (BMODE asserted). PCLK output
provides a 49.152-MHz clock signal, synchronized with data transfers, to the LLC when the
PHY-link interface is in legacy 1394a-2000 (BMODE input deasserted).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSB41BA3AIPFP | 功能描述:緩沖器和線路驅(qū)動器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFP | 功能描述:緩沖器和線路驅(qū)動器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFPG4 | 功能描述:1394 接口集成電路 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB41BA3ATPFPEP | 功能描述:緩沖器和線路驅(qū)動器 Mil Enh 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
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