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參數(shù)資料
| 型號： | TSB41BA3AIGGM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
| 中文描述： | 的IEEE 1394b三端口電纜收發(fā)器/仲裁者 |
| 文件頁數(shù)： | 12/66頁 |
| 文件大?。?/td> | 895K |
| 代理商： | TSB41BA3AIGGM |
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SLLS618B JUNE 2004 REVISED AUGUST 2004
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
TYPE
PFP
NO.
GGM
NO.
I/O
DESCRIPTION
S3
CMOS
33
E9
I
Port sleep/mode selection terminal 3. On hardware reset, this terminal when used with the
other 5 selection pins allows the user to select the speed and mode of the ports. See
Table 1. Programming is done by tying the terminals high through a 1-k
or smaller resistor
or by tying directly to ground through a 1-k
or smaller resistor. A bus holder is built into this
terminal.
S4
CMOS
32
E10
I
Port sleep/mode selection terminal 4. On hardware reset, this terminal when used with the
other 5 selection pins allows the user to select the speed and mode of the ports. See
Table 1. Programming is done by tying the terminals high through a 1-k
or smaller resistor
or by tying directly to ground through a 1-k
or smaller resistor. A bus holder is built into this
terminal.
S5_LKON
CMOS
2
K2
I/O
Port sleep/mode selection terminal 5 and link-on output. This terminal may be connected to
the link-on input terminal of the LLC through a 1-k
resistor if the link-on input is available
on the link layer.
On hardware reset, this terminal when used with the other 5 selection pins allows the user
to select the speed and mode of the ports. See Table 1. A bus holder is built into this
terminal.
After hardware reset, this terminal is the link-on output, which notifies the LLC or other
power-up logic to power up and become active. The link-on output is a square wave signal
with a period of approximately 163 ns (8 PCLK cycles) when active. The link-on output is
otherwise driven low, except during hardware reset when it is high impedance.
The link-on output is activated if the LLC is inactive (the LPS input inactive or the LCtrl bit
cleared) and when one:
a) The PHY receives a link-on PHY packet addressed to this node
b) The PEI (port-event interrupt) register bit is 1, or
c) Any of the CTOI (configuration-timeout interrupt), CPSI (cable-power-status interrupt),
or
d) The PHY is power cycled and the power class is 0 through 4
Once activated, the link-on output is active until the LLC becomes active (both the LPS
input active and the LCtrl bit set). The PHY also deasserts the link-on output when a bus-
reset occurs unless the link-on output is otherwise active because one of the interrupt bits
is set (that is, the link-on output is active due solely to the reception of a link-on PHY
packet).
In the case of power cycling the PHY, the LKON signal must stop after 167
μ
s if the above
conditions have not been met.
NOTE: If an interrupt condition exists which otherwise causes the link-on output to be
activated if the LLC were inactive, then the link-on output is activated when the LLC
subsequently becomes inactive.
TESTM
CMOS
78
H2
I
Test control input. This input is used in the manufacturing test of the TSB41BA3A. For
normal use this terminal must be pulled high through a 1-k
resistor to VDD.
Port 0 twisted-pair differential-signal terminals. Board traces from each pair of positive
and negative differential signal terminals must be kept matched and as short as
possible to the external load resistors and to the cable connector. Request the S800
1394b layout recommendations document from your Texas Instruments representative.
TPA0
TPA0+
TPB0
TPB0+
Cable
45,
46,
41,
42
A8
B7
B9
A9
I/O
TPA1
TPA1+
TPB1
TPB1+
Cable
52
53
48
49
A5
B5
A6
B6
I/O
Port 1 twisted-pair differential-signal terminals. Board traces from each pair of positive
and negative differential signal terminals must be kept matched and as short as
possible to the external load resistors and to the cable connector. Request the S800
1394b layout recommendations document from your Texas Instruments representative.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB41BA3AIPFP | 功能描述:緩沖器和線路驅(qū)動器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFP | 功能描述:緩沖器和線路驅(qū)動器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3APFPG4 | 功能描述:1394 接口集成電路 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB41BA3ATPFPEP | 功能描述:緩沖器和線路驅(qū)動器 Mil Enh 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| TSB41BA3B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
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