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| 型號： | TMS320SP5410AGGU12 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Fixed-Point Digital Signal Processor |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 43/100頁 |
| 文件大?。?/td> | 913K |
| 代理商： | TMS320SP5410AGGU12 |
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3.8.9
DMA Transfer in Doubleword Mode
3.8.10
DMA Channel Index Registers
3.8.11
DMA Interrupts
TMS320VC5410A
Fixed-Point Digital Signal Processor
SPRS139G–NOVEMBER 2000–REVISED JANUARY 2005
Doubleword mode allows the DMA to transfer 32-bit words in any index mode. In doubleword mode, two
consecutive 16-bit transfers are initiated and the source and destination addresses are automatically
updated following each transfer. In this mode, each 32-bit word is considered to be one element.
The particular DMA channel index register is selected by way of the SIND and DIND fields in the DMA
transfer mode control register (DMMCRn). Unlike basic address adjustment, in conjunction with the frame
index DMFRI0 and DMFRI1, the DMA allows different adjustment amounts depending on whether or not
the element transfer is the last in the current frame. The normal adjustment value (element index) is
contained in the element index registers DMIDX0 and DMIDX1. The adjustment value (frame index) for
the end of the frame, is determined by the selected DMA frame index register, either DMFRI0 or DMFRI1.
The element index and the frame index affect address adjustment as follows:
Element index: For all except the last transfer in the frame, the element index determines the amount
to be added to the DMA channel for the source/destination address register (DMSRCx/DMDSTx) as
selected by the SIND/DIND bits.
Frame index: If the transfer is the last in a frame, frame index is used for address adjustment as
selected by the SIND/DIND bits. This occurs in both single-frame and multiframe transfers.
The ability of the DMA to interrupt the CPU based on the status of the data transfer is configurable and is
determined by the IMOD and DINM bits in the DMA transfer mode control register (DMMCRn). The
available modes are shown in Table 3-14.
Table 3-14. DMA Interrupts
MODE
DINM
1
1
1
1
0
0
IMOD
0
1
0
1
X
X
INTERRUPT
ABU (non-decrement)
ABU (non-decrement)
Multiframe
Multiframe
Either
Either
At full buffer only
At half buffer and full buffer
At block transfer complete (DMCTRn = DMSEFCn[7:0] = 0)
At end of frame and end of block (DMCTRn = 0)
No interrupt generated
No interrupt generated
Functional Overview
43
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| TMS320SP5410AZGU12 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Point DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320SP6713GDP225 | 制造商:Texas Instruments 功能描述:5410PGE-100 100 MIPS 144TQFP REV 2.0 - Trays |
| TMS320SPVC5470GHK | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Quad Bus Buffer Gate With 3-State Outputs RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320SS16FNL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMS320SS16NL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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