參數(shù)資料
型號： TMS0320F2810PBKAEP
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Digital Signal Processors
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 152/159頁
文件大?。?/td> 2084K
代理商： TMS0320F2810PBKAEP
Electrical Specifications
150
March 2004 Revised October 2004
SGUS051A
6.32
Flash Timing (F281x Only)
6.32.1
Recommended Operating Conditions
MIN
100
NOM
1000
MAX
UNIT
cycles
Nf
NOTP
Flash endurance for the array (Write/erase cycles)
0
°
C to 85
°
C
0
°
C to 85
°
C
OTP endurance for the array (Write cycles)
1
write
Table 654. Flash Parameters at 150-MHz SYSCLKOUT
PARAMETER
MIN
TYP
MAX
UNIT
16-Bit Word
35
μ
s
ms
Program Time
8K Sector
170
16K Sector
320
ms
Erase Time
8K Sector
10
S
16K Sector
11
S
IDD3VFLP
VDD3VFL current consumption during the Erase/Program cycle
Erase
75
mA
Program
35
mA
IDDP
IDDIOP
Typical parameters as seen at room temperature using flash API V1 including function call overhead.
VDD current consumption during Erase/Program cycle
VDDIO current consumption during Erase/Program cycle
140
mA
20
mA
Table 655. Flash/OTP Access Timing
PARAMETER
MIN
TYP
MAX
UNIT
ta(fp)
ta(fr)
ta(OTP)
NOTE: For 150 MHz, PAGE WS = 5 and RANDOM WS = 5
For 135 MHz, PAGE WS = 4 and RANDOM WS = 4
Paged Flash access time
36
ns
Random Flash access time
36
ns
OTP access time
60
ns
Table 656. Minimum Required Wait-States at Different Frequencies
SYSCLKOUT (MHz)
SYSCLKOUT (ns)
PAGE WAIT-STATE
RANDOM WAIT STATE§
150
6.67
5
5
120
8.33
4
4
100
10
3
3
75
13.33
2
2
50
20
1
1
30
33.33
1
1
25
40
0
1
15
66.67
0
1
4
250
0
1
Formulas to compute page wait state and random wait state:
Page Wait State
t
a(fp)
t
c(SCO)
1
(round up to the next highest integer), or 0 whichever is larger
Random Wait State
t
a(fr)
t
c(SCO)
1
(round up to the next highest integer), or 1 whichever is larger
§Random wait state must be greater than or equal to 1
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