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參數資料
| 型號： | TI380PCM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS |
| 中文描述： | PCI總線接口，可用于TI380 COMMPROCESSORS |
| 文件頁數： | 37/40頁 |
| 文件大?。?/td> | 530K |
| 代理商： | TI380PCM |
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TI380PCIA
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS
SPWS035 – JUNE 1997
37
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
ac characteristics for serial EEPROM interface over recommended ranges of supply voltage and
operating free-air temperature (see Figure 22)
PARAMETER
ALT
MIN
MAX
UNIT
μ
s
ns
μ
s
ns
μ
s
μ
s
μ
s
μ
s
μ
s
ns
μ
s
μ
s
μ
s
ns
tCH1CH2
tCL1CL2
tDH1DH2
tDL1DL2
tCHDX
tCHCL
tDLCL
tCLDX
tCLCH
tDXCX
tCHDH
tDHDL
tCLQV
tCLQX
fC
tLPF
tW
NOTES: 13. For a restart condition, or following a write cycle
14. In the multibyte write mode only, if accessed bytes are on two consecutive rows (upper 5 MSB must not change), the maximum
programming time is doubled to 20 ms.
Rise time, clock
tR
tF
tR
tF
1
Fall time, clock
300
Rise time, input
1
Fall time, input
300
Setup time, clock high to input transition (see Note 13)
tSU:STA
t-HIGH
tHD:STA
tHD:DAT
tLOW
tSU:DAT
tSU:STO
tBUF
tAA
tDH
fSCL
TI
tWR
4.7
Pulse duration, clock high
4
Input low to clock low (START)
4
Clock low to input transition
0
Pulse duration, clock low
4.7
Input transition to clock transition
250
Clock high to input high (STOP)
4.7
Input high to input low (bus-free)
4.7
Clock low to output valid
0.3
3.5
Clock high to output transition
300
Clock frequency
100
kHz
Input low pass first order filter time constant (SCL and SDA inputs)
100
ns
Write time (see Note 14)
10
ms
A
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