參數(shù)資料
型號： ST92186B3BK
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP32
封裝： PLASTIC, SDIP-32
文件頁數(shù)： 92/148頁
文件大小： 1664K
代理商： ST92186B3BK
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ST92186B - INTERRUPTS
3.6 EXTERNAL INTERRUPTS
The standard ST9 core contains 8 external inter-
rupt sources grouped into four pairs.
Table 11. External Interrupt Channel Grouping
Note 1: available on SDIP42 only
Each source has a trigger control bit TEA0,..TED1
(R242,EITR.0,..,7 Page 0) to select triggering on
the rising or falling edge of the external pin. If the
Trigger control bit is set to “1”, the corresponding
pending bit IPA0,..,IPD1 (R243,EIPR.0,..,7 Page
0) is set on the input pin rising edge, if it is cleared,
the pending bit is set on the falling edge of the in-
put pin. Each source can be individually masked
through
the
corresponding
control
bit
IMA0,..,IMD1 (EIMR.7,..,0). See Figure 25.
The priority level of the external interrupt sources
can be programmed among the eight priority lev-
els with the control register EIPLR (R245). The pri-
ority level of each pair is software defined using
the bits PRL2, PRL1. For each pair, the even
channel (A0,B0,C0,D0) of the group has the even
priority level and the odd channel (A1,B1,C1,D1)
has the odd (lower) priority level.
Figure 24. Priority Level Examples
n
Figure 24 shows an example of priority levels.
Figure 25 gives an overview of the External inter-
rupt control bits and vectors.
– The source of the interrupt channel A0 can be
selected between the external pin INT0 (when
IA0S = “1”, the reset value) or the On-chip Timer/
Watchdog peripheral (when IA0S = “0”).
– The source of the interrupt channel A1 can be
selected between the external pin INT4 (when
INTS = “1”) or the on-chip Standard Timer.
– The source of the interrupt channel INTC0 can
be selected between the INT4 external pin (DI-
ON=OSDE=0) or the Display Controller interrupt
(all other cases) by programming the DION,
OSDE bits in the OSDER register.
– The source of the interrupt channel C1 can be
selected between the external pin INT5 (when
the AD_INT bit in the AD-INT register=0) or the
on-chip ADC (when AD-INT=1).
– The source of the interrupt channel D1 can be
selected between the external pin INT7 (when
the IRWDIS bit in the IRSC register = 1) or the
on-chip IR (when IRWDIS=0).
Warning: When using channels shared by both
external interrupts and peripherals, special care
must be taken to configure their control registers
for both peripherals and interrupts.
Table 12. Multiplexed Interrupt Sources
External Interrupt
Channel
INT7
INT6 1)
INTD1
INTD0 1)
INT5
INT4
INTC1
INTC0
INT3 1)
INT2
INTB1 1)
INTB0
INT1
INT0
INTA1
INTA0
10
0
1
0
1
PL2D PL1D PL2C PL1C PL2B PL1B PL2A PL1A
INT.D1:
INT.C1: 001=1
INT.D0:
SOURCE
PRIORITY
SOURCE
INT.A0: 010=2
INT.A1: 011=3
INT.B1: 101=5
INT.B0: 100=4
INT.C0: 000=0
EIPLR
VR000151
0
100=4
101=5
Channel
Internal
Interrupt
Source
External
Interrupt
Source
Related Pin
SDIP42
SDIP32
INTA0
Timer/
Watchdog
INT0
P3.2
INTA1
STIM Timer
INT1
P3.4
INTB0
INT2
P2.4
INTB1
INT3
P2.2
-
INTC0
OSD
INT4
P2.3
INTC1
ADC
INT5
P2.7
INTD0
INT6
P2.1
-
INTD1
IR
INT7
P2.0
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