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參數(shù)資料
| 型號(hào)： | ST92186B3BK |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP32 |
| 封裝： | PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 112/148頁 |
| 文件大?。?/td> | 1664K |
| 代理商： | ST92186B3BK |
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ST92186B - I/O PORTS
INPUT/OUTPUT BIT CONFIGURATION (Cont’d)
When Px.n is programmed as an Output:
(Figure 36)
– The Output Buffer is turned on in an Open-drain
or Push-pull configuration.
– The data stored in the Output Master Latch is
copied both into the Input Latch and into the Out-
put Slave Latch, driving the I/O pin, at the end of
the execution of the instruction.
When Px.n is programmed as Bidirectional:
(Figure 37)
– The Output Buffer is turned on in an Open-Drain
or Weak Pull-up configuration (except when dis-
abled in hardware).
– The data present on the I/O pin is sampled into
the Input Latch at the beginning of the execution
of the instruction.
– The data stored in the Output Master Latch is
copied into the Output Slave Latch, driving the I/
O pin, at the end of the execution of the instruc-
tion.
Warning: Due to the fact that in bidirectional mode
the external pin is read instead of the output latch,
particular care must be taken with arithmetic/logic
and Boolean instructions performed on a bidirec-
tional port pin.
These instructions use a read-modify-write se-
quence, and the result written in the port register
depends on the logical level present on the exter-
nal pin.
This may bring unwanted modifications to the port
output register content.
For example:
Port register content, 0Fh
external port value, 03h
(Bits 3 and 2 are externally forced to 0)
A bset instruction on bit 7 will return:
Port register content, 83h
external port value, 83h
(Bits 3 and 2 have been cleared).
To avoid this situation, it is suggested that all oper-
ations on a port, using at least one bit in bidirec-
tional mode, are performed on a copy of the port
register, then transferring the result with a load in-
struction to the I/O port.
When Px.n is programmed as a digital Alter-
nate Function Output:
(Figure 38)
– The Output Buffer is turned on in an Open-Drain
or Push-Pull configuration.
– The data present on the I/O pin is sampled into
the Input Latch at the beginning of the execution
of the instruction.
– The signal from an on-chip function is allowed to
load the Output Slave Latch driving the I/O pin.
Signal timing is under control of the alternate
function. If no alternate function is connected to
Px.n, the I/O pin is driven to a high level when in
Push-Pull configuration, and to a high imped-
ance state when in open drain configuration.
Figure 37. Bidirectional Configuration
n
Figure 38. Alternate Function Configuration
n
OUTPUT MASTER LATCH
INPUT LATCH
OUTPUT SLAVE LATCH
INTERNAL DATA BUS
I/O PIN
WEAK PULL-UP
TTL
(or Schmitt Trigger)
OPEN DRAIN
TO PERIPHERAL
INPUTS AND
INTERRUPTS
INPUT LATCH
FROM
INTERNAL DATA BUS
I/O PIN
OPEN DRAIN
TTL
(or Schmitt Trigger)
PUSH-PULL
PERIPHERAL
OUTPUT
TO PERIPHERAL
INPUTS AND
INTERRUPTS
OUTPUT SLAVE LATCH
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PDF描述 |
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| ST92195B3B1/XXX | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP56 |
| ST92195B4B1/XXX | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP56 |
| ST92195B5T1/XXX | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP64 |
| ST92195B6T1/XXX | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST92195 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
| ST92195B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
| ST92195B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
| ST92195B1B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
| ST92195B1T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
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