參數(shù)資料
型號： ST7FLU05MAE
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO8
封裝： 0.150 INCH, LEAD FREE, PLASTIC, SOP-8
文件頁數(shù)： 44/124頁
文件大?。?/td> 2186K
代理商： ST7FLU05MAE
Obsolete
Product(s)
- Obsolete
Product(s)
Central processing unit
ST7LUS5, ST7LU05, ST7LU09
26/124
5.3.5
Stack pointer (SP)
The stack pointer is a 16-bit register which is always pointing to the next free location in the
stack. It is then decremented after data has been pushed onto the stack and incremented
before data is popped from the stack (see Figure 11).
Since the stack is 64 bytes deep, the 10 most significant bits are forced by hardware.
Following an MCU reset, or after a reset stack pointer (RSP) instruction, the stack pointer
contains its reset value (the SP5 to SP0 bits are set) which is the stack higher address.
The stack pointer least significant byte, called “S”, can be directly accessed by a load (LD)
instruction.
Note:
When the lower limit is exceeded, the stack pointer wraps around to the stack upper limit,
without indicating the stack overflow. The previously stored information is then overwritten
and therefore lost. The stack also wraps in case of an underflow.
The stack is used to save the return address during a subroutine call and the CPU context
during an interrupt. The user may also directly manipulate the stack by means of the PUSH
and POP instructions. In the case of an interrupt, the PCL is stored at the first location
pointed to by the SP. Then the other registers are stored in the next locations as shown in
Figure 11.
●
When an interrupt is received, the SP is decremented and the context is pushed on the
stack.
●
On return from interrupt, the SP is incremented and the context is popped from the
stack.
A subroutine call occupies two locations and an interrupt five locations in the stack area.
Figure 8.
Stack manipulation example
SP
Reset value: 00 FFh
15
14
13
12
11
10
9876
543210
0000000011
SP[5:0]
R/WR/W R/WR/W R/WR/W R/WR/W R/W R/W
R/W
PCH
PCL
SP
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
Y
CALL
Subroutine
Interrupt
event
PUSH Y
POP Y
IRET
RET
or RSP
@ 00FFh
@ 00C0h
Stack higher address = 00FFh
Stack lower address = 00C0h
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