參數(shù)資料
型號(hào)： ST7FLU05MAE
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO8
封裝： 0.150 INCH, LEAD FREE, PLASTIC, SOP-8
文件頁(yè)數(shù)： 123/124頁(yè)
文件大?。?/td> 2186K
代理商： ST7FLU05MAE
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Obsolete
Product(s)
- Obsolete
Product(s)
Electrical characteristics
ST7LUS5, ST7LU05, ST7LU09
98/124
12.4
Supply current characteristics
The following current consumption specified for the ST7 functional operating modes over
temperature range does not take into account the clock source current consumption. To get
the total device consumption, the two current values must be added (except for halt mode
for which the clock is stopped).
Table 68.
Supply current consumption
Symbol
Parameter
Conditions(1)
1.
TA = -40 to +125 °C unless otherwise specified
Typ
Max
Unit
IDD
Supply current in run mode(2)
2.
CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all
peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
fCPU = 8 MHz
5.0
9.0
mA
Supply current in wait mode(3)
3.
All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; clock
input (CLKIN) driven by external square wave, LVD disabled.
fCPU = 8 MHz
1.5
4.0
Supply current in slow mode(4)
4.
Slow mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at
VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave,
LVD disabled.
fCPU/32 = 250 kHz
650
1100
A
Supply current in slow wait mode(5)
5.
Slow wait mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static
value at VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square
wave, LVD disabled.
fCPU/32 = 250 kHz
500
900
Supply current in AWUFH mode(6)(7)
6.
All I/O pins in input mode with a static value at VDD or VSS (no load). Data tested in production at VDD max.
and fCPU max.
7.
This consumption refers to the halt period only and not the associated run period which is software
dependent.
40
120(8)
8.
Data based on characterization, not tested in production
Supply current in active halt mode
100
250
Supply current in halt mode(9)
9.
All I/O pins in output mode with a static value at VSS (no load), LVD disabled. Data based on
characterization results, tested in production at VDD max and fCPU max.
0.5
3
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