參數(shù)資料
型號(hào): ST7FLCD1
廠商: 意法半導(dǎo)體
英文描述: 8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller
中文描述: 8位微控制器的液晶顯示器為60千字節(jié)閃存,2千字節(jié)RAM,2個(gè)DDC的港口和紅外線控制器
文件頁數(shù): 80/95頁
文件大?。?/td> 633K
代理商: ST7FLCD1
8-bit Timer with External Trigger (TIMB)
ST7FLCD1
80/95
14
8-bit Timer with External Trigger (TIMB)
14.1
Introduction
Timer B is an 8 bit-programmable free-running downcounter, driven by a programmable prescaler.
An external signal can also trigger the countdown. The Timer B block diagram is shown in
Figure 42
.
14.2
Main Features
Programmable Prescaler: f
CPU
divided by 1, 8 or 16
Overflow status flag and maskable interrupt
Auto reload capability
An external signal with programmable polarity can trigger the count-down
14.3
Functional Description
The 8 bit-downcounter timer counts from a start value down to 00h. The start value is preloaded
from the associated 8-bit TIMCPRB register every time it is written, or when the counter has
reached the 00h value (Auto Reload feature) if the TAR bit is set. The OVF flag is set when the
downcounter reaches 00h. An interrupt is generated if the OVFE bit is set.
When the EXT bit is set, an external signal edge triggers the countdown start. The EDG bit controls
the rising or falling signal edge. Once detected, the selected edge sets the EEF flag, preloads the
downcounter with the start value and starts the countdown as usual.
During the countdown, the downcounter cannot be retriggered and subsequent pulses occurring
after the countdown has started are ignored until the counter reaches 00h.
Figure 42: External Timer Block Diagram
8-bit downcounter
Prescaler
1 / 8 / 16
OVF
OVFE
OVF interrupt request
TIMCSRB
TAR
TB1
TB0
EXT
EDG
EEF
Preload register
8
TIMCPRB
Auto reload
EXTRIG
Interrupt
EDG
EEF
EXT
Control Logic
f
TIMER
f
CPU
Fixed
Prescaler
% 128
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