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| 型號： | ST7FLCD1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller |
| 中文描述： | 8位微控制器的液晶顯示器為60千字節(jié)閃存，2千字節(jié)RAM，2個DDC的港口和紅外線控制器 |
| 文件頁數(shù)： | 64/95頁 |
| 文件大小： | 633K |
| 代理商： | ST7FLCD1 |
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Display Data Channel Interfaces (DDC)
ST7FLCD1
64/95
It defines the 256-byte block within the RAM address space containing the data structure. The LSB
is loaded with the data address sent by the master after a write Device Address. It defines the byte
within the data structure currently addressed. It is reset upon entry into the DDC2B mode.
Write Operation
Once the DDC2B Interface has acknowledged a write transfer request, i.e. a Device Address with
RW = 0, it waits for a data address. When the latter is received, it is acknowledged and loaded into
the LSB.
Then, the master may send any number of data bytes that are all acknowledged by the DDC2B
Interface. The data bytes are written in RAM if the WP bit = 0 in the DCR register, otherwise the
RAM location is not modified.
Write operations are always performed in RAM and therefore do not delay DDC transfers.
Meanwhile, concurrent software execution is halted for 2 clock cycles.
Read Operations
All read operations consist of retrieving the data pointed to by an internal address counter which is
initialized by a dummy write and which increments with any read. The DDC2B Interface always
waits for an acknowledge during the 9th bit-time. If the master does not pull the SDA line low during
this bit-time, the DDC2B Interface ends the transfer and switches to a stand-by state.
Current address read:
After generating a START condition the master sends a read device
address (RW = 1). The DDC2B Interface acknowledges this and outputs the data byte pointed to by
the internal address pointer which subsequently increments. The master must NOT acknowledge
this byte and must terminate the transfer with a STOP condition.
Figure 36: Mapping of DDC2B Data Structure
Figure 37: Write Sequence
MSB
LSB
0
7
8
15
Addr Pointer
in RAM
0000h
FFFFh
128-byte Data
Structure
2
0000h
FFFFh
2
128-byte Data
Structure
A0h/A1h
A0h/A1h
Extended EDID v1 (if present)
Basic EDID v1
LSB :
80h -> FFh
LSB :
00h -> 7Fh
Note: Refer to
Table 23
for RAM address mapping.
S
R
A
Data Address
Data IN 1
Data IN 2
A
A
Data IN n
A
S
A
DEV ADDR
SDA
XXXXh
ADDR
ADDR + n -1
Addr.
Pointer
ADDR + 1
ADDR + n
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| ST7FLCD1_05 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for LCD Monitors with 60 KBytes Flash,2 KBytes RAM, 2 DDC Ports and Infrared Controller |
| ST7FLI15BF1U6 | 功能描述:8位微控制器 -MCU 8-Bit MCU w/ Single Volt Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST7FLI15BF1U6TR | 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST7FLI19BF1M3TR | 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST7FLI19BF1U6TR | 功能描述:8位微控制器 -MCU 8-Bit MCU w/ Single Volt Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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