參數(shù)資料
型號(hào): ST7FLCD1
廠商: 意法半導(dǎo)體
英文描述: 8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller
中文描述: 8位微控制器的液晶顯示器為60千字節(jié)閃存,2千字節(jié)RAM,2個(gè)DDC的港口和紅外線控制器
文件頁數(shù): 52/95頁
文件大?。?/td> 633K
代理商: ST7FLCD1
I2C Single-Master Bus Interface
ST7FLCD1
52/95
10
I2C Single-Master Bus Interface
10.1
Introduction
The I2C Bus Interface serves as an interface between the microcontroller and the serial I2C bus. It
provides single-master functions, and controls all I2C bus-specific sequencing, protocol and timing.
It supports Fast I2C mode (400 kHz) and up to 800 kHz for certain applications.
10.2
Main Features
Parallel / I2C bus protocol converter
Interrupt generation
Standard I2C mode/Fast I2C mode (up to 800 kHz for certain applications)
7-bit Addressing
I2C Single Master Mode
End of byte transmission flag
Transmitter /Receiver flag
Clock generation
10.3
General Description
In addition to receiving and transmitting data, this interface converts data from serial to parallel
format and vice versa, using either an interrupt or a polled handshake. The interrupts are enabled or
disabled by software. The interface is connected to the I2C bus by a data pin (SDAI) and by a clock
pin (SCLI). It can be connected both with a standard I2C bus and a Fast I2C bus. This selection is
made by software.
Mode Selection
The interface can operate in the two following modes:
1. Master transmitter/receiver,
2. Idle (default).
The interface automatically switches from Idle to Master mode after it generates a START condition
and from Master to Idle mode after it generates a STOP condition.
Communication Flow
The interface initiates a data transfer and generates the clock signal. A serial data transfer always
begins with a start condition and ends with a stop condition. Both start and stop conditions are
generated by software.
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte following the start
condition is the address byte.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must send
an acknowledge bit to the transmitter. Refer to
Figure 28
.
Acknowledge is enabled and disabled by software.
The speed of the I2C interface is selected as Standard (0 to 100 kHz) and Fast I2C (100 to 400 kHz)
and up to 800 kHz for certain applications.
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