參數(shù)資料
型號(hào): ST7FLCD1
廠商: 意法半導(dǎo)體
英文描述: 8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller
中文描述: 8位微控制器的液晶顯示器為60千字節(jié)閃存,2千字節(jié)RAM,2個(gè)DDC的港口和紅外線控制器
文件頁(yè)數(shù): 32/95頁(yè)
文件大小: 633K
代理商: ST7FLCD1
Clocks & Low Power Modes
ST7FLCD1
32/95
6
Clocks & Low Power Modes
6.1
Clock System
6.1.1
General Description
The device requires a certain number of clock signals in order to operate. All clock signals are
derived from the root clock signal CkXT provided at the output of the "OSC" circuit (refer to
Figure 13
). If a quartz crystal is applied on pins OSCIN and OSCOUT, the OSC operates in a
crystal-controlled oscillator mode. An external clock signal can also be applied on OSCIN pin,
putting the OSC in external clock mode operation.
The block diagram in
Figure 13
shows the basic configuration of the clock system.
6.1.2
Crystal Oscillator Mode
In this mode, the root clock is generated by the on-chip oscillator controlled by an external parallel
fundamental-mode quartz crystal. General design precautions must be followed to ensure
maximum stability. Foot capacitors C
L1
and C
L2
must be adapted to match the crystal oscillator. A
100-k resistor is internally connected between pins OSCIN and OSCOUT.
6.1.3
External Clock Mode
In this mode, an external clock is provided on pin OSCIN, while pin OSCOUT is left open. The signal
is internally buffered before feeding the subsequent stages. There is the same emphasis on stability
of the external clock as in Crystal Oscillator mode.
6.1.4
Clock Signals
The root clock is divided by a factor of 3 to obtain the CPU clock (f
CPU
).
Figure 13: Main Clock Generation
OSC
O
O
V
CkXT
OSC
O
O
V
CkXT
External
Clock
Crystal Oscillator Mode
External Clock Mode
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