參數(shù)資料
型號: ST72F324B
廠商: 意法半導(dǎo)體
英文描述: 5V Range 8-Bit MCU With 8 TO 32K FLASH/ROM, 10-Bit ADC, 4 Timers, SPI, SCI Interface(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU)
中文描述: 5V范圍內(nèi)的8位8到32K閃存/ ROM,10位ADC,4個計時器,SPI和SCI接口(具有比較方案,國際檢察官聯(lián)合會,嵌套中斷,中華語文研習(xí)所,人事登記的8位微控制器)
文件頁數(shù): 7/167頁
文件大?。?/td> 1641K
代理商: ST72F324B
ST72324B
7/167
1 INTRODUCTION
The ST72F324B and ST72324B devices are
members of the ST7 microcontroller family de-
signed for the 5V operating range.
– The 32-pin devices are designed for mid-range
applications
– The 42/44-pin devices target the same range of
applications requiring more than 24 I/O ports.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with FLASH or ROM pro-
gram memory.
Under software control, all devices can be placed
in WAIT, SLOW, ACTIVE-HALT or HALT mode,
reducing power consumption when the application
is in idle or stand-by state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
Figure 1. Device Block Diagram
8-BIT CORE
ALU
A
OSC1
OSC2
V
PP
CONTROL
PROGRAM
MEMORY
(8K - 60K Bytes)
V
DD
RESET
PORT F
PF7:6,4,2:0
TIMER A
BEEP
PORT A
RAM
(384 - 1024 Bytes)
PORT C
10-BIT ADC
V
AREF
V
SSA
PORT B
PB4:0
(5 bits on J devices)
(3 bits on K devices)
PORT E
PE1:0
(2 bits)
SCI
TIMER B
PA7:3
(5 bits on J devices)
(4 bits on K devices)
PORT D
PD5:0
SPI
PC7:0
(8 bits)
V
SS
WATCHDOG
OSC
LVD
MCC/RTC/BEEP
(6 bits on J devices)
(2 bits on K devices)
(6 bits on J devices)
(5 bits on K devices)
3
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