參數(shù)資料
型號(hào)： ST72F324B
廠商： 意法半導(dǎo)體
英文描述： 5V Range 8-Bit MCU With 8 TO 32K FLASH/ROM, 10-Bit ADC, 4 Timers, SPI, SCI Interface(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU)
中文描述： 5V范圍內(nèi)的8位8到32K閃存/ ROM，10位ADC，4個(gè)計(jì)時(shí)器，SPI和SCI接口（具有比較方案，國際檢察官聯(lián)合會(huì)，嵌套中斷，中華語文研習(xí)所，人事登記的8位微控制器）
文件頁數(shù)： 133/167頁
文件大小： 1641K
代理商： ST72F324B
ST72324B
133/167
12.9 I/O PORT PIN CHARACTERISTICS
12.9.1 General Characteristics
Subject to general operating conditions for V
DD
, f
OSC
, and T
A
unless otherwise specified.
Notes:
1. Data based on characterization results, not tested in production.
2.
Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
3. When the current limitation is not possible, the V
maximum must be respected, otherwise refer to I
specifica-
tion. A positive injection is induced by V
IN
>V
DD
while a negative injection is induced by V
IN
<V
SS
. Refer to
Section 12.2.2
on page 116
for more details.
4.
Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example and leaving the I/O unconnected on the board or an external pull-up or pull-down resistor (see
Figure 66
). Cur-
rent peak value based on design simulation and technology characteristics, not tested in production, and depending on
V
DD
and temperature values.
5. The Schmitt trigger that is connected to every I/O port is disabled for analog inputs only when ADON bit is ON and the
particular ADC channel is selected (with port configured in input floating mode)". When the ADON bit OFF static current
consumption is induced.
6. The R
PU
pull-up equivalent resistor is based on a resistive transistor (corresponding I
PU
current characteristics de-
scribed in
Figure 67
).
7. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
IL
Input low level voltage (standard voltage
devices)
1)
Input high level voltage
1)
Schmitt trigger voltage hysteresis
2)
Injected Current on Flash device pin PB0
Injected Current on other I/O pins
Σ
I
INJ(PIN)3)
Total injected current (sum of all I/O and
control pins)
I
lkg
Input leakage current
Static current consumption induced by each
floating input pin
R
PU
C
IO
I/O pin capacitance
t
f(IO)out
Output low to high level rise time
1)
0.3xV
DD
V
V
IH
V
hys
0.7xV
DD
V
0.7
I
INJ(PIN)3)
V
DD
=5V
0
+4
±4
mA
±
25
V
SS
≤
V
IN
≤
V
DD
Floating input
mode
4)5)
V
IN
=
V
SS
±1
μ
A
I
S
200
Weak pull-up equivalent resistor
6)
V
DD
=5V
50
120
5
25
250
k
pF
Output high to low level fall time
1)
C
L
=50pF
Between 10% and
90%
ns
t
r(IO)out
25
t
w(IT)in
External interrupt pulse time
7)
1
t
CPU
1
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