參數(shù)資料
型號： ST72F324B
廠商： 意法半導(dǎo)體
英文描述： 5V Range 8-Bit MCU With 8 TO 32K FLASH/ROM, 10-Bit ADC, 4 Timers, SPI, SCI Interface(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU)
中文描述： 5V范圍內(nèi)的8位8到32K閃存/ ROM，10位ADC，4個計時器，SPI和SCI接口（具有比較方案，國際檢察官聯(lián)合會，嵌套中斷，中華語文研習(xí)所，人事登記的8位微控制器）
文件頁數(shù)： 66/167頁
文件大小： 1641K
代理商： ST72F324B
ST72324B
66/167
1
16-BIT TIMER
(Cont’d)
Notes:
1. After a processor write cycle to the OC
i
HR
reg-
ister, the output compare function is inhibited
until the OC
i
LR
register is also written.
2. If the OC
i
E bit is not set, the OCMP
i
pin is a
general I/O port and the OLVL
i
bit will not
appear when a match is found but an interrupt
could be generated if the OCIE bit is set.
3. When the timer clock is f
CPU
/2, OCF
i
and
OCMP
i
are set while the counter value equals
the OC
i
R register value (see
Figure 8
). This
behaviour is the same in OPM or PWM mode.
When the timer clock is f
CPU
/4, f
CPU
/8 or in
external clock mode, OCF
i
and OCMP
i
are set
while the counter value equals the OC
i
R regis-
ter value plus 1 (see
Figure 9
).
4. The output compare functions can be used both
for generating external events on the OCMP
i
pins even if the input capture mode is also
used.
5. The value in the 16-bit OC
i
R
register and the
OLV
i
bit should be changed after each suc-
cessful comparison in order to control an output
waveform or establish a new elapsed timeout.
Forced Compare Output capability
When the FOLV
i
bit is set by software, the OLVL
i
bit is copied to the OCMP
i
pin. The OLV
i
bit has to
be toggled in order to toggle the OCMP
i
pin when
it is enabled (OC
i
E bit=1). The OCF
i
bit is then not
set by hardware, and thus no interrupt request is
generated.
The FOLVL
i
bits have no effect in both one pulse
mode and PWM mode.
Figure 41. Output Compare Block Diagram
OUTPUT COMPARE
CIRCUIT
16-bit
OC1R
Register
16 BIT
FREE RUNNING
COUNTER
OC1E
CC0
CC1
OC2E
OLVL1
OLVL2
OCIE
(Control Register 1)
CR1
(Control Register 2)
CR2
0
0
0
OCF2
OCF1
(Status Register)
SR
16-bit
16-bit
OCMP1
Pin
OCMP2
Pin
Latch
1
Latch
2
OC2R
Register
FOLV2 FOLV1
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ST72F324BJ4B5 功能描述:8位微控制器 -MCU ST72324B 5V RANGE 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F324BJ4B6 功能描述:8位微控制器 -MCU 5V RANGE 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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