參數(shù)資料
型號(hào): SSTE32882HLBBKG
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: SSTE SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA176
封裝: 8 X 13.50 MM, 0.65 MM PITCH, GREEN, MO-246F, CABGA-176
文件頁(yè)數(shù): 42/69頁(yè)
文件大小: 1263K
代理商: SSTE32882HLBBKG
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
47
SSTE32882KA1
7314/5
CONFIDENTIAL - THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
COMMERCIAL TEMPERATURE RANGE
3T Timing During Multiple DRAM MRS Commands
1 CK and Yn left out for better visibility.
2 n = 1 for QuadCS disabled, n = 3 for QuadCS enabled.
CK(1)
DCKE[1:0]
DA[15:0], DBA[2:0]
Input
Outputs
@ 3T
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
n+8
n+9
n+10
n+11
n+12
n+13
DODT[1:0]
DRAS
DCAS, DWE
DCS0
DCS[n:1](2)
Yn(1)
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
n+8
n+9
n+10
n+11
n+12
n+13
QCKE[1:0]
QODT[1:0]
QRAS
QCAS, QWE
QCS0
QCS[n:1](2)
Output Inversion Disabled
Output Inversion enabled
QAA[15:0], QABA[2:0],
QBA12, QBA10,
QBA[2:0]
QBA[15:13], QBA11,
QBA[9:3], QBBA[2:0]
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相關(guān)代理商/技術(shù)參數(shù)
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