參數(shù)資料
型號： SM320F28335GHHAEP
廠商： Texas Instruments
文件頁數(shù)： 80/167頁
文件大?。?/td> 0K
描述： IC DIGITAL SIGNAL CTLR 179-BGA
產(chǎn)品培訓(xùn)模塊： ControlSUITE
Motor Signal Chain Overview
TPS75005 Single IC Power for C2000 MCU
標(biāo)準(zhǔn)包裝： 189
系列： TMS320F28x3x Delfino™, C2000™
核心處理器： C28x
芯體尺寸： 32-位
速度： 150MHz
連通性： CAN，EBI/EMI，I²C，McBSP，SCI，SPI，UART/USART
外圍設(shè)備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 88
程序存儲器容量： 512KB（256K x 16）
程序存儲器類型： 閃存
RAM 容量： 34K x 16
電壓 - 電源 (Vcc/Vdd)： 1.805 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 179-LFBGA
包裝： 托盤
產(chǎn)品目錄頁面： 718 (CN2011-ZH PDF)
其它名稱： 296-25243
SPRS581D – JUNE 2009 – REVISED MAY 2012
Contents
1
SM320F28335 DSC
............................................................................................................. 10
1.1
Features
.................................................................................................................... 10
1.2
SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
........................................ 11
2
Introduction
...................................................................................................................... 12
2.1
Pin Assignments
........................................................................................................... 13
2.2
Signal Descriptions
........................................................................................................ 22
3
Functional Overview
.......................................................................................................... 31
3.1
Memory Maps
.............................................................................................................. 32
3.2
Brief Descriptions
.......................................................................................................... 36
3.2.1
C28x CPU
....................................................................................................... 36
3.2.2
Memory Bus (Harvard Bus Architecture)
.................................................................... 36
3.2.3
Peripheral Bus
.................................................................................................. 36
3.2.4
Real-Time JTAG and Analysis
................................................................................ 37
3.2.5
External Interface (XINTF)
.................................................................................... 37
3.2.6
Flash
............................................................................................................. 37
3.2.7
M0, M1 SARAMs
............................................................................................... 37
3.2.8
L0, L1, L2, L3, L4, L5, L6, L7 SARAMs
..................................................................... 37
3.2.9
Boot ROM
....................................................................................................... 38
3.2.10
Security
.......................................................................................................... 38
3.2.11
Peripheral Interrupt Expansion (PIE) Block
................................................................. 39
3.2.12
External Interrupts (XINT1-XINT7, XNMI)
................................................................... 40
3.2.13
Oscillator and PLL
.............................................................................................. 40
3.2.14
Watchdog
........................................................................................................ 40
3.2.15
Peripheral Clocking
............................................................................................. 40
3.2.16
Low-Power Modes
.............................................................................................. 40
3.2.17
Peripheral Frames 0, 1, 2, 3 (PFn)
........................................................................... 41
3.2.18
General-Purpose Input/Output (GPIO) Multiplexer
......................................................... 41
3.2.19
32-Bit CPU-Timers (0, 1, 2)
................................................................................... 41
3.2.20
Control Peripherals
............................................................................................. 42
3.2.21
Serial Port Peripherals
......................................................................................... 42
3.3
Register Map
............................................................................................................... 43
3.4
Device Emulation Registers
.............................................................................................. 44
3.5
Interrupts
.................................................................................................................... 45
3.5.1
External Interrupts
.............................................................................................. 48
3.6
System Control
............................................................................................................ 49
3.6.1
OSC and PLL Block
............................................................................................ 51
3.6.1.1
External Reference Oscillator Clock Option
.................................................... 52
3.6.1.2
PLL-Based Clock Module
......................................................................... 52
3.6.1.3
Loss of Input Clock
................................................................................ 54
3.6.2
Watchdog Block
................................................................................................. 54
3.7
Low-Power Modes Block
................................................................................................. 55
4
Peripherals
....................................................................................................................... 56
4.1
DMA Overview
............................................................................................................. 56
4.2
32-Bit CPU-Timers 0/1/2
................................................................................................. 58
4.3
Enhanced PWM Modules (ePWM1/2/3/4/5/6)
......................................................................... 60
4.4
High-Resolution PWM (HRPWM)
....................................................................................... 63
4.5
Enhanced CAP Modules (eCAP1/2/3/4/5/6)
........................................................................... 65
4.6
Enhanced QEP Modules (eQEP1/2)
.................................................................................... 68
4.7
Analog-to-Digital Converter (ADC) Module
............................................................................ 70
4.7.1
ADC Connections if the ADC Is Not Used
.................................................................. 73
4.7.2
ADC Registers
.................................................................................................. 73
2
Contents
Copyright 2009–2012, Texas Instruments Incorporated
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