Table 6-49. ADC Electrical" />
參數(shù)資料
型號： SM320F28335GHHAEP
廠商： Texas Instruments
文件頁數(shù)： 53/167頁
文件大?。?/td> 0K
描述： IC DIGITAL SIGNAL CTLR 179-BGA
產(chǎn)品培訓(xùn)模塊： ControlSUITE
Motor Signal Chain Overview
TPS75005 Single IC Power for C2000 MCU
標(biāo)準包裝： 189
系列： TMS320F28x3x Delfino™, C2000™
核心處理器： C28x
芯體尺寸： 32-位
速度： 150MHz
連通性： CAN，EBI/EMI，I²C，McBSP，SCI，SPI，UART/USART
外圍設(shè)備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 88
程序存儲器容量： 512KB（256K x 16）
程序存儲器類型： 閃存
RAM 容量： 34K x 16
電壓 - 電源 (Vcc/Vdd)： 1.805 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 179-LFBGA
包裝： 托盤
產(chǎn)品目錄頁面： 718 (CN2011-ZH PDF)
其它名稱： 296-25243
SPRS581D – JUNE 2009 – REVISED MAY 2012
6.15 On-Chip Analog-to-Digital Converter
Table 6-49. ADC Electrical Characteristics (over recommended operating conditions)(1) (2)
PARAMETER
MIN
TYP
MAX
UNIT
DC SPECIFICATIONS(3)
Resolution
12
Bits
ADC clock
0.001
25
MHz
ACCURACY
INL (Integral nonlinearity)
1-12.5 MHz ADC clock (6.25 MSPS)
±1.5
LSB
12.5-25 MHz ADC clock
LSB
±2
(12.5 MSPS)
DNL (Differential nonlinearity)(4)
±1
LSB
Offset error (5) (3)
±15
LSB
Overall gain error with internal reference (6) (3)
±30
LSB
Overall gain error with external reference (3)
±30
LSB
Channel-to-channel offset variation
±4
LSB
Channel-to-channel gain variation
±4
LSB
ANALOG INPUT
Analog input voltage (ADCINx to ADCLO) (7)
0
3
V
ADCLO
–5
0
5
mV
Input capacitance
10
pF
Input leakage current
±5
μA
INTERNAL VOLTAGE REFERENCE (6)
VADCREFP - ADCREFP output voltage at the pin based on
1.275
V
internal reference
VADCREFM - ADCREFM output voltage at the pin based on
0.525
V
internal reference
Voltage difference, ADCREFP - ADCREFM
0.75
V
Temperature coefficient
50
PPM/°C
EXTERNAL VOLTAGE REFERENCE(6) (8)
ADCREFSEL[15:14] = 11b
1.024
V
VADCREFIN - External reference voltage input on ADCREFIN
ADCREFSEL[15:14] = 10b
1.500
V
pin 0.2% or better accurate reference recommended
ADCREFSEL[15:14] = 01b
2.048
V
AC SPECIFICATIONS
SINAD (100 kHz) Signal-to-noise ratio + distortion
67.5
dB
SNR (100 kHz) Signal-to-noise ratio
68
dB
THD (100 kHz) Total harmonic distortion
–79
dB
ENOB (100 kHz) Effective number of bits
10.9
Bits
SFDR (100 kHz) Spurious free dynamic range
83
dB
(1)
Tested at 25 MHz ADCCLK.
(2)
All voltages listed in this table are with respect to VSSA2.
(3)
ADC parameters for gain error and offset error are only specified if the ADC calibration routine is executed from the Boot ROM. See
Section 4.7.3 for more information.
(4)
TI specifies that the ADC will have no missing codes.
(5)
1 LSB has the weighted value of 3.0/4096 = 0.732 mV.
(6)
A single internal/external band gap reference sources both ADCREFP and ADCREFM signals, and hence, these voltages track
together. The ADC converter uses the difference between these two as its reference. The total gain error listed for the internal reference
is inclusive of the movement of the internal bandgap over temperature. Gain error over temperature for the external reference option will
depend on the temperature profile of the source used.
(7)
Voltages above VDDA + 0.3 V or below VSS - 0.3 V applied to an analog input pin may temporarily affect the conversion of another pin.
To avoid this, the analog inputs should be kept within these limits.
(8)
TI recommends using high precision external reference TI part REF3020/3120 or equivalent for 2.048-V reference.
146
Electrical Specifications
Copyright 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): SM320F28335-EP
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