
Rev. 2.0, 09/02, page 51 of 732
4.3.2
Notes on Board Design
Measures against radiation noise are taken in this LSI. If further reduction in radiation noise is
needed, it is recommended to use a multiple layer board and provide a layer exclusive to the
system ground.
When using a crystal oscillator, place the crystal oscillator and its load capacitors as close as
possible to the XTAL and EXTAL pins. Do not route any signal lines near the oscillator circuitry
as shown in figure 4.5. Otherwise, correct oscillation can be interfered by induction.
C
L2
Signal A Signal B
This LSI
C
L1
XTAL
EXTAL
Avoid
Figure 4.5 Cautions for Oscillator Circuit System Board Design
A circuitry shown in figure 4.6 is recommended as an external circuitry around the PLL. Place
oscillation stabilization capacitor C1 close to the PLLCAP pin, and ensure that no other signal
lines cross this line. Separate the PLL power lines (PLLVcc, PLLVss) and the system power lines
(Vcc, Vss) at the board power supply source, and be sure to insert bypass capacitors CB and CPB
close to the pins.
PLLCAP
PLLV
CC
PLLV
SS
V
CC
V
SS
C1: 470 pF
CPB = 0.1
μ
F
*
CB = 0.1
μ
F
*
(Values are preliminary recommended values.)
Note:
*
CB and CPB are laminated ceramic type.
Rp=200
R1=3k
Figure 4.6 Recommended External Circuitry around the PLL
In principle, electromagnetic waves are emitted from an LSI in operation. This LSI regards the
lower of the system clock (
φ
) and the peripheral clock (P
φ
) as fundamental (for example, if
φ
= 40