
Rev. 2.0, 09/02, page 22 of 732
2.4.2
Addressing Modes
Table 2.8 describes addressing modes and effective address calculation.
Table 2.8 Addressing Modes and Effective Addresses
Addressing
Mode
Instruction
Format
Effective Address Calculation
Equation
Direct register
addressing
Rn
The effective address is register Rn. (The operand
is the contents of register Rn.)
—
Indirect register
addressing
@Rn
The effective address is the contents of register Rn.
Rn
Rn
Rn
Post-increment
indirect register
addressing
@Rn+
The effective address is the contents of register Rn.
A constant is added to the content of Rn after the
instruction is executed. 1 is added for a byte
operation, 2 for a word operation, and 4 for a
longword operation.
Rn
Rn
1/2/4
+
Rn + 1/2/4
Rn
(After the
instruction
executes)
Byte:
Rn + 1
→
Rn
Word:
Rn + 2
→
Rn
Longword:
Rn + 4
→
Rn
Byte:
Rn – 1
→
Rn
Word:
Rn – 2
→
Rn
Longword:
Rn – 4
→
Rn
(Instruction is
executed with
Rn after this
calculation)
Pre-decrement
indirect register
addressing
@-Rn
The effective address is the value obtained by
subtracting a constant from Rn. 1 is subtracted for
a byte operation, 2 for a word operation, and 4 for
a longword operation.
Rn
1/2/4
Rn – 1/2/4
–
Rn – 1/2/4
Indirect register
addressing with
displacement
@(disp:4,
Rn)
The effective address is the sum of Rn and a 4-bit
displacement (disp). The value of disp is zero-
extended, and remains unchanged for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
Rn
Rn + disp
×
1/2/4
+
×
1/2/4
disp
(zero-extended)
Byte:
Rn + disp
Word:
Rn + disp
×
2
Longword:
Rn + disp
×
4