
Rev. 2.0, 09/02, page 72 of 732
6.3.2
Interrupt Control Register 2 (ICR2)
ICR2 is a 16-bit register that sets the edge detection mode of the external interrupt input pins
IRQ0
to
IRQ7
. ICR2 is, however, valid only when IRQ interrupt request detection mode is set to the
edge detection mode by the sense select bits of IRQ0 to IRQ 7 in Interrupt control register 1
(ICR1). If the IRQ interrupt request detection mode has been set to low level detection mode, the
setting of ICR2 is ignored.
Bit
Bit Name
Initial Value
R/W
Description
15
14
IRQ0ES1
IRQ0ES0
0
0
R/W
R/W
This bit sets the IRQ0 interrupt request edge
detection mode.
00: Interrupt request is detected on falling edge of
IRQ0
input
01: Interrupt request is detected on rising edge of
IRQ0
input
10: Interrupt request is detected on both of falling
and rising edge of
IRQ0
input
11: Cannot be set
13
12
IRQ1ES1
IRQ1ES0
0
0
R/W
R/W
This bit sets the IRQ1 interrupt request edge
detection mode.
00: Interrupt request is detected on falling edge of
IRQ1
input
01: Interrupt request is detected on rising edge of
IRQ1
input
10: Interrupt request is detected on both of falling
and rising edge of
IRQ1
input
11: Cannot be set
11
10
IRQ2ES1
IRQ2ES0
0
0
R/W
R/W
This bit sets the IRQ2 interrupt request edge
detection mode.
00: Interrupt request is detected on falling edge of
IRQ2
input
01: Interrupt request is detected on rising edge of
IRQ2
input
10: Interrupt request is detected on both of falling
and rising edge of
IRQ2
input
11: Cannot be set