參數(shù)資料
型號： SC28L92A1B-S
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44
封裝： 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù)： 52/73頁
文件大?。?/td> 336K
代理商： SC28L92A1B-S
SC28L92_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 19 December 2007
56 of 73
NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
[7]
Minimum DACKN time is ((tDCR or tDCW)tCSC + 2 X1 edges + rise time over 5 ns). Two X1 edges is 273 ns at 3.6864 MHz. For faster bus
cycles, the 80xxx bus timing may be used while in the 68xxx mode. It is not necessary to wait for DACKN to insure the proper operation
of the SC26C92. In all cases the data will be written to the SC28L92 on the falling edge of DACKN or the rise of CEN. The fall of CEN
initializes the bus cycle. The rise of CEN ends the bus cycle. DACKN LOW or CEN HIGH completes the write cycle.
Table 68.
Dynamic characteristics, 3.3 V operation[1]
VCC = 3.3 V ± 10 %, Tamb = 40 °C to +85 °C, unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Reset timing (see Figure 10)
tRES
reset pulse width
100
20
-
ns
Bus timing[2] (see Figure 11)
tAS
A0 to A3 set-up time to RDN, WRN LOW
10
6
-
ns
tAH
A0 to A3 hold time from RDN, WRN LOW
33
16
-
ns
tCS
CEN set-up time to RDN, WRN LOW
0
-
ns
tCH
CEN hold time from RDN, WRN LOW
0
-
ns
tRW
WRN, RDN pulse width (LOW time)
20
10
-
ns
tDD
data valid after RDN LOW
125 pF load; see Figure 9
for smaller loads
-
4675ns
tDA
RDN LOW to data bus active
--ns
tDF
data bus oating after RDN or CEN HIGH
-
15
20
ns
tDI
RDN or CEN HIGH to data bus invalid
--ns
tDS
data bus set-up time before WRN or CEN
HIGH (write cycle)
43
20
-
ns
tDH
data hold time after WRN HIGH
0
15
-
ns
tRWD
HIGH time between read and/or write
cycles
10
-
ns
tPS
port in set-up time before RDN LOW
(Read IP ports cycle)
0
20
-
ns
tPH
port in hold time after RDN HIGH
0
20
-
ns
tPD
OP port valid after WRN or CEN HIGH
(OPR write cycle)
-
5075ns
Interrupt timing (see Figure 16)
tIR
INTRN (or OP3 to OP7 when used as
interrupts)
read Rx FIFO
(RxRDY/FFULL interrupt)
-
4079ns
write Tx FIFO (TxRDY
interrupt)
-
4079ns
reset command (delta
break change interrupt)
-
4079ns
stop C/T command
(counter/timer interrupt
-
4079ns
read IPCR (delta input port
change interrupt)
-
4079ns
write IMR (clear of change
interrupt mask bit(s))
-
4079ns
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相關代理商/技術參數(shù)
參數(shù)描述
SC28L92A1BS,528 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS,551 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS,557 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS-F 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS-S 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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