- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98078 > SC28L92A1B-S (NXP SEMICONDUCTORS) 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44 PDF資料下載
參數(shù)資料
| 型號： | SC28L92A1B-S |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 19/73頁 |
| 文件大?。?/td> | 336K |
| 代理商： | SC28L92A1B-S |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁
SC28L92_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 19 December 2007
26 of 73
NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
7.3 Register descriptions
7.3.1 Mode registers
7.3.1.1
Mode Register 0 channel A (MR0A)
Table 21.
ROPR - Reset Output Port bits Register (ROPR)
7
6
5
4
3
2
1
0
reset OP7
reset OP6
reset OP5
reset OP4
reset OP3
reset OP2
reset OP1
reset OP0
Table 22.
OPCR - Output Port Conguration Register
OP1 and OP0 are the RTSN output and are controlled by the MR register
7
6
5
4
3
2
1
0
congure
OP7
congure
OP6
congure
OP5
congure
OP4
congure
OP3
congure
OP3
congure
OP2
congure
OP2
Table 23.
MR0A - Mode Register 0 channel A (address 0x0) bit allocation
MR0 is accessed by setting the MR pointer to logic 0 via the command register command B.
7
6
5
4
3
2
1
0
RxWATCHDOG
RxINT[2]
TxINT[1:0]
FIFOSIZE
BAUDRATE
EXTENDED II
TEST2
BAUDRATE
EXTENDED I
Table 24.
MR0A - Mode Register 0 channel A (address 0x0) bit description
Bit
Symbol
Description
7
RxWATCHDOG
This bit controls the receiver watchdog timer.
0 = disable
1 = enable
When enabled, the watchdog timer will generate a receiver interrupt if
the receiver FIFO has not been accessed within 64 bit times of the
receiver 1
× clock. The watchdog timer is used to alert the control
processor that data is in the Rx FIFO that has not been read. This
situation will occur when the byte count of the last part of a message
is not large enough to generate an interrupt.
The watchdog timer presents itself as a receiver interrupt with the
RxRDY bit set in SR and ISR.
6
RxINT[2]
Bit 2 of receiver FIFO interrupt level. This bit along with bit 6 of MR1
sets the ll level of the FIFO that generates the receiver interrupt.
Note that this control is split between MR0 and MR1. This is for
backward compatibility to the SC26C92 and SCC2681.
For the receiver these bits control the number of FIFO positions lled
when the receiver will attempt to interrupt. After the reset the receiver
FIFO is empty. The default setting of these bits cause the receiver to
attempt to interrupt when it has one or more bytes in it; see Table 25.
5 and 4
TxINT[1:0]
Transmitter interrupt ll level. For the transmitter these bits control the
number of FIFO positions empty when the receiver will attempt to
interrupt; see Table 26. After the reset the transmit FIFO has 8 bytes
empty. It will then attempt to interrupt as soon as the transmitter is
enabled. The default setting (TxINT[1:0] = 00) condition the
transmitter to attempt to interrupt only when it is completely empty. As
soon as one byte is loaded, it is no longer empty and hence will
withdraw its interrupt request.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SC3327S | LVTTL SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| SC3526S/TD | TTL SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| SC3527S/D | TTL SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| SC3529S/TD | TTL SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| SC68C198A1A-T | 8 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PQCC84 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC28L92A1BS,528 | 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1BS,551 | 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1BS,557 | 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1BS-F | 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1BS-S | 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。