參數(shù)資料
型號： SC28L92A1B-S
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44
封裝： 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù)： 41/73頁
文件大小： 336K
代理商： SC28L92A1B-S
SC28L92_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 19 December 2007
46 of 73
NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
6
-
Channel B change in break.
0 = not active
1 = active
This bit, when set, indicates that the channel B receiver has detected the
beginning or the end of a received break. It is reset when the CPU issues a
channel B reset break change interrupt command.
5
RxRDYB
RxB interrupt.
0 = not active
1 = active
This bit indicates that the channel B receiver is interrupting according to the ll
level programmed by the MR0 and MR1 registers or the watchdog timer has
timed-out. This bit has a different meaning than the receiver ready/full bit in the
status register.
4
TxRDYB
TxB interrupt.
0 = not active
1 = active
This bit indicates that the channel B transmitter is interrupting according to the
interrupt level programmed in the MR0[5:4] bits. This bit has a different meaning
than the TxRDY bit in the status register.
3
-
Counter ready.
0 = not active
1 = active
In the counter mode, this bit is set when the counter reaches terminal count and
is reset when the counter is stopped by a stop counter command.
In the timer mode, this bit is set once each cycle of the generated square wave
(every other time that the counter/timer reaches zero count). The bit is reset by a
stop counter command. The command, however, does not stop the
counter/timer.
2
-
Channel A change in break.
0 = not active
1 = active
This bit, when set, indicates that the channel A receiver has detected the
beginning or the end of a received break. It is reset when the CPU issues a
channel A reset break change interrupt command.
1
RxRDYA
RxA interrupt.
0 = not active
1 = active
This bit indicates that the channel A receiver is interrupting according to the ll
level programmed by the MR0 and MR1 registers or the watchdog timer has
timed-out. This bit has a different meaning than the receiver ready/full bit in the
status register.
0
TxRDYA
TxA interrupt.
0 = not active
1 = active
This bit indicates that the channel A transmitter is interrupting according to the
interrupt level programmed in the MR0[5:4] bits. This bit has a different meaning
than the TxRDY bit in the status register.
Table 58.
ISR - Interrupt status register (address 0x5) bit description …continued
Bit
Symbol
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC28L92A1BS,528 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS,551 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS,557 功能描述:UART 接口集成電路 3V-5V 1CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS-F 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L92A1BS-S 功能描述:UART 接口集成電路 3V-5V 1CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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