參數(shù)資料
型號： SAA7392HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Channel encoder/decoder CDR60
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80
文件頁數(shù)： 49/76頁
文件大?。?/td> 246K
代理商： SAA7392HL
2000 Mar 21
49
Philips Semiconductors
Preliminary specification
Channel encoder/decoder CDR60
SAA7392
7.12.3
S
UBCODE
C
ONFIGURATION
R
EGISTER
2 (S
UB
C
ONFIG
2)
Table 99
Subcode Configuration Register 2 (address 24H) - READ/WRITE
Table 100
Description of SubConfig2 bits
7.12.4
S
UBCODE
S
TART
D
ATA
R
EGISTER
(S
UB
S
TART
D
ATA
)
Table 101
Subcode Start Data Register (address 25H) - WRITE
Table 102
Description of SubStartData bits
7.12.5
S
UBCODE
D
ATA
R
EGISTER
(S
UB
D
ATA
)
Sub-CPU read/write from/to the SubData register causes a read or write to occur on the Q-code memory. Normally the
sub-CPU would access all 10 bytes of a Q-code bank. Before such a block access the sub-CPU must issue a write to
the SubStartWrite register.
Table 103
Subcode Data Register (address 26H) - READ/WRITE
7
6
5
4
3
2
1
0
BSwOn
InOBO
relcnt.2
relcnt.1
relcnt.0
curcnt.2
curcnt.1
curcnt.0
BIT
SYMBOL
DESCRIPTION
7
BSwOn
If BSwOn = 0, then no bank switching. If BSwOn = 1, then bank switch will occur when
first subcode sync output by EFM modulator and curcnt<2:0> = 000
If InOBO = 0, then original bank is used again. In this case no bank switching or
interrupts occur and automatic bank update is still done on the original bank, even when
the other bank is output. If InOBO = 1, then the other bank is automatically inserted
once into Q-channel, this bit is automatically reset to logic 0.
Count value to load curcnt<2:0>.
Current value of subcode frame counter.
6
InOBO
5 to 3
2 to 0
relcnt<2:0>
curcnt<2:0>
7
6
5
4
3
2
1
0
NextSet
BIT
SYMBOL
DESCRIPTION
7
NextSet
If NextSet = 0, then access other bank. If NextSet = 1, then access current bank that is
being used for Q-channel data.
These 7 bits are reserved.
6 to 0
7
6
5
4
3
2
1
0
QCD.7
QCD.6
QCD.5
QCD.4
QCD.3
QCD.2
QCD.1
QCD.0
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